llvm - Unofficial llvm GIT mirror used in EmbToolkit

	Commit message (Expand)	Author	Age
*	[X86][SchedModel] Add missing scheduling model for SSE related instructions.	Quentin Colombet	2014-02-24
*	Fix known typos	Alp Toker	2014-01-24
*	Adds support for Atom Silvermont (SLM) - -march=slm	Preston Gurd	2013-09-13
*	Fix IMULX machine model. Multiple def operands require multiple SchedWrites.	Andrew Trick	2013-06-21
*	Update machine models. Specify buffer sizes for OOO processors.	Andrew Trick	2013-06-15
*	Machine Model: Add MicroOpBufferSize and resource BufferSize.	Andrew Trick	2013-06-15
*	Corrected Atom latencies for SSE SQRT instructions.	Preston Gurd	2013-05-07
*	Add the X86 FMAs to the scheduling model.	Nadav Rotem	2013-03-28
*	Add the Haswell machine model.	Nadav Rotem	2013-03-28
*	Enable SandyBridgeModel for all modern Intel P6 descendants.	Jakob Stoklund Olesen	2013-03-26
*	Remove IIC_DEFAULT from X86Schedule.td	Jakob Stoklund Olesen	2013-03-25
*	Add a WriteMicrocoded for ancient microcoded instructions.	Jakob Stoklund Olesen	2013-03-21
*	Add a catch-all WriteSystem SchedWrite type.	Jakob Stoklund Olesen	2013-03-20
*	Annotate X86InstrCompiler.td with SchedRW lists.	Jakob Stoklund Olesen	2013-03-19
*	Define more SchedWrites for annotating X86 instructions.	Jakob Stoklund Olesen	2013-03-16
*	Prepare for adding InstrSchedModel annotations to X86 instructions.	Jakob Stoklund Olesen	2013-03-14
*	MIsched: add an ILP window property to machine model.	Andrew Trick	2013-01-09
*	I'm introducing a new machine model to simultaneously allow simple	Andrew Trick	2012-07-07
*	X86 itinerary properties.	Andrew Trick	2012-06-05
*	whitespace	Andrew Trick	2012-06-05
*	Added X86 Atom latencies to X86InstrMMX.td.	Preston Gurd	2012-05-11
*	Added X86 Atom latencies for instructions in X86InstrInfo.td.	Preston Gurd	2012-05-10
*	Adds Intel Atom scheduling latencies to X86InstrSystem.td.	Preston Gurd	2012-05-04
*	This patch continues the work of adding instruction latencies for X86 Atom,	Preston Gurd	2012-05-02
*	This patch adds X86 instruction itineraries for non-pseudo opcodes in	Preston Gurd	2012-03-19
*	Intel Atom instruction itineraries for mov sign extension and mov zero extens...	Andrew Trick	2012-02-29
*	This patch adds instruction latencies for the SSE instructions	Preston Gurd	2012-02-27
*	Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,...	Jia Liu	2012-02-18
*	Instruction scheduling itinerary for Intel Atom.	Andrew Trick	2012-02-01