summaryrefslogtreecommitdiff
path: root/lib/Target
Commit message (Collapse)AuthorAge
* Remove the X86 Maximal Stack Alignment Check pass as it is no longer necessary.Chad Rosier2012-11-26
| | | | | | | | | | | | | | | This pass was conservative in that it always reserved the FP to enable dynamic stack realignment, which allowed the RA to use aligned spills for vector registers. This happens even when spills were not necessary. The RA has since been improved to use unaligned spills when necessary. The new behavior is to realign the stack if the frame pointer was already reserved for some other reason, but don't reserve the frame pointer just because a function contains vector virtual registers. Part of rdar://12719844 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168627 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix comments in HexagonOperands.td.Jyotsna Verma2012-11-26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168617 91177308-0d34-0410-b5e6-96231b3b80d8
* Normalize splat 256bit vectors with 8 elements.Jakub Staszak2012-11-26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168600 91177308-0d34-0410-b5e6-96231b3b80d8
* Decouple MCInstBuilder from the streamer per Eli's request.Benjamin Kramer2012-11-26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168597 91177308-0d34-0410-b5e6-96231b3b80d8
* Add MCInstBuilder, a utility class to simplify MCInst creation similar to ↵Benjamin Kramer2012-11-26
| | | | | | | | MachineInstrBuilder. Simplify some repetitive code with it. No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168587 91177308-0d34-0410-b5e6-96231b3b80d8
* PPC: Reinstate the fatal error when trying to emit a macho file.Benjamin Kramer2012-11-24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168543 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: Share applyFixup between ELF and Darwin.Benjamin Kramer2012-11-24
| | | | | | The implementations already diverged a bit, merge them back together. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168542 91177308-0d34-0410-b5e6-96231b3b80d8
* PPC: MCize most of the darwin PIC emission.Benjamin Kramer2012-11-24
| | | | | | | The last remaining bit is "bcl 20, 31, AnonSymbol", which I couldn't find the instruction definition for. Only whitespace changes in assembly output. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168541 91177308-0d34-0410-b5e6-96231b3b80d8
* PPC: Share applyFixup between ELF and Darwin.Benjamin Kramer2012-11-24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168540 91177308-0d34-0410-b5e6-96231b3b80d8
* PPC: Simplify code with Twines.Benjamin Kramer2012-11-24
| | | | | | No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168539 91177308-0d34-0410-b5e6-96231b3b80d8
* Update call to the new syntax.Bill Wendling2012-11-23
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168512 91177308-0d34-0410-b5e6-96231b3b80d8
* Add more functions to the target library information.Meador Inge2012-11-22
| | | | | | | | I discovered a few more missing functions while migrating optimizations from the simplify-libcalls pass to the instcombine (I already added some in r167659). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168501 91177308-0d34-0410-b5e6-96231b3b80d8
* Mips direct object xgot supportJack Carter2012-11-21
| | | | | | | | | | | | | | | | This patch provides support for the MIPS relocations: *) R_MIPS_GOT_HI16 *) R_MIPS_GOT_LO16 *) R_MIPS_CALL_HI16 *) R_MIPS_CALL_LO16 These are used for large GOT instruction sequences. Contributer: Jack Carter git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168471 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Generate big GOT code.Akira Hatanaka2012-11-21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168460 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Simplify lowering functions in MipsISelLowering.cpp by using the helperAkira Hatanaka2012-11-21
| | | | | | | functions added in r168456. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168458 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Add helper functions that create nodes for computing address.Akira Hatanaka2012-11-21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168456 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Add command line option "-mxgot".Akira Hatanaka2012-11-21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168455 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] When a node which loads from a GOT is created, pass a MachinePointerInfoAkira Hatanaka2012-11-21
| | | | | | | referring to a GOT entry. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168453 91177308-0d34-0410-b5e6-96231b3b80d8
* Add new predicates for the immediate operands.Jyotsna Verma2012-11-21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168451 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Add target operand flag enums for big GOT relocations.Akira Hatanaka2012-11-21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168450 91177308-0d34-0410-b5e6-96231b3b80d8
* Use one common 'let' expression to set PrintMethod for all immediate operands.Jyotsna Verma2012-11-21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168449 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for varargs functions for msp430.Anton Korobeynikov2012-11-21
| | | | | | | Patch by Job Noorman! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168440 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for byval args. Patch by Job Noorman!Anton Korobeynikov2012-11-21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168439 91177308-0d34-0410-b5e6-96231b3b80d8
* Finish the renaming.Rafael Espindola2012-11-21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168437 91177308-0d34-0410-b5e6-96231b3b80d8
* Renamed HexagonImmediates.td -> HexagonOperands.td.Jyotsna Verma2012-11-21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168434 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix execution domain for packed FMA4 instructions.Craig Topper2012-11-21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168417 91177308-0d34-0410-b5e6-96231b3b80d8
* Mark ISD::FMA as Legal instead of custom for x86 with FMA3/FMA4. Needed so ↵Craig Topper2012-11-21
| | | | | | that llvm.muladd can be converted to ISD::FMA for fp_contract. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168413 91177308-0d34-0410-b5e6-96231b3b80d8
* Make calcLiveInMask method static.Jakub Staszak2012-11-21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168409 91177308-0d34-0410-b5e6-96231b3b80d8
* Make isScratchReg and isFPCopy methods static.Jakub Staszak2012-11-21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168407 91177308-0d34-0410-b5e6-96231b3b80d8
* Add obvious constantness.Jakub Staszak2012-11-20
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168396 91177308-0d34-0410-b5e6-96231b3b80d8
* Removing some unused instruction definitions from the Hexagon backend.Jyotsna Verma2012-11-20
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168388 91177308-0d34-0410-b5e6-96231b3b80d8
* Intel OCL built-ins calling conventions now support MacOS 32-bit.Elena Demikhovsky2012-11-20
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168359 91177308-0d34-0410-b5e6-96231b3b80d8
* Mark FP_EXTEND form v2f32 to v2f64 as "expand" for ARM NEON. Patch by Pete ↵Eli Friedman2012-11-17
| | | | | | Couperus. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168240 91177308-0d34-0410-b5e6-96231b3b80d8
* Initial implementation of MipsTargetLowering::isLegalAddressingMode.Akira Hatanaka2012-11-17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168230 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename methods like PairSRegs() to createSRegpairNode() to meet our codingWeiming Zhao2012-11-17
| | | | | | | | style requirement. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168229 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove hard coded registers in ARM ldrexd and strexd instructionsWeiming Zhao2012-11-16
| | | | | | | | | | | This patch replaces the hard coded GPR pair [R0, R1] of Intrinsic:arm_ldrexd and [R2, R3] of Intrinsic:arm_strexd with even/odd GPRPair reg class. Similar to the lowering of atomic_64 operation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168207 91177308-0d34-0410-b5e6-96231b3b80d8
* Make sure FABS on v2f32 and v4f32 is legal on ARM NEONAnton Korobeynikov2012-11-16
| | | | | | | This fixes PR14359 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168200 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix handling of aliases to functions.Richard Osborne2012-11-16
| | | | | | An alias to a function should use pc relative addressing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168199 91177308-0d34-0410-b5e6-96231b3b80d8
* [NVPTX] Order global variables in def-use order before emiting them in the ↵Justin Holewinski2012-11-16
| | | | | | final assembly git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168198 91177308-0d34-0410-b5e6-96231b3b80d8
* Using const cast to alleviate a warning.Joe Abbey2012-11-16
| | | | | | | | A PR is being filed to address some code issues here. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168185 91177308-0d34-0410-b5e6-96231b3b80d8
* Add the Erlang/HiPE calling convention, patch by Yiannis Tsiouris.Duncan Sands2012-11-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168166 91177308-0d34-0410-b5e6-96231b3b80d8
* Use roundps/pd for llvm.ceil, llvm.trunc, llvm.rint, and llvm.nearbyint of ↵Craig Topper2012-11-16
| | | | | | vector types. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168141 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Fix delay slot filler so that instructions with register operand $1 areAkira Hatanaka2012-11-16
| | | | | | | allowed in branch delay slot. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168131 91177308-0d34-0410-b5e6-96231b3b80d8
* Mark FP_ROUND for converting NEON v2f64 to v2f32 as expand. Add a missingEli Friedman2012-11-15
| | | | | | | | | | case to vector legalization so this actually works. Patch by Pete Couperus. Fixes PR12540. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168107 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Add predicate HasFPIdx for floating-point indexed load instructionAkira Hatanaka2012-11-15
| | | | | | | | support and use it in place of HasMips32r2Or64. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168089 91177308-0d34-0410-b5e6-96231b3b80d8
* PowerPC: Lowering floor intrinsic for AltivecAdhemerval Zanella2012-11-15
| | | | | | | | | This patch lowers the llvm.floor, llvm.ceil, llvm.trunc, and llvm.nearbyint to Altivec instruction when using 4 single-precision float vectors. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168086 91177308-0d34-0410-b5e6-96231b3b80d8
* Add assertions in MipsLongBranch which check the size of basic blocks.Akira Hatanaka2012-11-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168078 91177308-0d34-0410-b5e6-96231b3b80d8
* Return 0 instead of false.Jakub Staszak2012-11-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168076 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify code.Jakub Staszak2012-11-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168064 91177308-0d34-0410-b5e6-96231b3b80d8
* Use empty parens for empty function parameter list instead of '(void)'.Dmitri Gribenko2012-11-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168049 91177308-0d34-0410-b5e6-96231b3b80d8
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-22 07:26:09 +0000