summaryrefslogtreecommitdiff
path: root/lib/Target
Commit message (Expand)AuthorAge
* Put the functionality for printing a value to a raw_ostream as anChandler Carruth2014-01-09
* Move declaration of variables down to first use.Matt Arsenault2014-01-08
* [AArch64][NEON] Added UXTL and UXTL2 instruction aliasesAna Pazos2014-01-08
* [x86] Remove OpSize16 flag from MOV32r0David Woodhouse2014-01-08
* [x86] Support R_386_PC8, R_386_PC16 and R_X86_64_PC8David Woodhouse2014-01-08
* [x86] Add JMP_2 and other 16-bit PC-relative branch instructionsDavid Woodhouse2014-01-08
* [x86] Do not relax PUSHi16 to PUSHi32 (PR18414)David Woodhouse2014-01-08
* [x86] Make AsmParser validate registers for memory operands a bit betterDavid Woodhouse2014-01-08
* [x86] Fix MOV8ao8 et al for 16-bit mode, fix up disassembler to understandDavid Woodhouse2014-01-08
* [x86] Use 16-bit addressing where possible in 16-bit modeDavid Woodhouse2014-01-08
* [x86] Fix JCXZ,JECXZ_32 for 16-bit modeDavid Woodhouse2014-01-08
* [x86] Disambiguate RET[QL] and fix aliases for 16-bit modeDavid Woodhouse2014-01-08
* [x86] Disambiguate [LS][IG]DT{32,64}m and add 16-bit versions, fix aliasesDavid Woodhouse2014-01-08
* [x86] Add JMP16[rm],CALL16[rm] instructions, and fix up aliasesDavid Woodhouse2014-01-08
* [x86] Add PUSHA16,POPA16 instructions, and fix aliases for 16-bit modeDavid Woodhouse2014-01-08
* [x86] Add OpSize16 to instructions that need itDavid Woodhouse2014-01-08
* AVX-512: Added more intrinsics for pmin/pmax, pabs, blend, pmuldq.Elena Demikhovsky2014-01-08
* [patch] Adjust behavior of FDE cross-section relocs for targets that don't su...Iain Sandoe2014-01-08
* [AArch64 NEON] Fix generating incorrect value type of NEON_VDUPLANEKevin Qin2014-01-08
* [SparcV9] Rename operands in some sparc64 instructions so that TableGen can e...Venkatraman Govindaraju2014-01-08
* [Sparc] Correct the mask for fixup_sparc_br19.Venkatraman Govindaraju2014-01-08
* [Sparc] Add support for parsing branch instructions and conditional moves.Venkatraman Govindaraju2014-01-08
* ARM IAS: properly handle expression operandsSaleem Abdulrasool2014-01-08
* [x86] Kill gratuitous X86_{32,64}TargetMachine subclasses, use X86TargetMachineDavid Woodhouse2014-01-08
* Move the llvm mangler to lib/IR.Rafael Espindola2014-01-07
* Don't assert with private type info variables.Rafael Espindola2014-01-07
* Add ARM fconsts/fconstd aliases for vmov.f32/vmov.f64David Peixotto2014-01-07
* [arm] Fix an incorrect comment in ARMUnwindOpAsm.h.Logan Chien2014-01-07
* Move the LLVM IR asm writer header files into the IR directory, as theyChandler Carruth2014-01-07
* Re-sort all of the includes with ./utils/sort_includes.py so thatChandler Carruth2014-01-07
* [AArch64]Add support to spill/fill D tuples such as DPair/DTriple/DQuad. Ther...Hao Liu2014-01-07
* [AArch64]Add support to copy D tuples such as DPair/DTriple/DQuad and Q tuple...Hao Liu2014-01-07
* [Sparc] Add support for parsing sparc asm modifiers such as %hi, %lo etc., Venkatraman Govindaraju2014-01-07
* [AArch64 NEON] Fixed incorrect immediate used in BIC instruction.Kevin Qin2014-01-07
* ARM IAS: allow more depth in contextual diagnosticsSaleem Abdulrasool2014-01-07
* ARM IAS: refactor unwind contextSaleem Abdulrasool2014-01-07
* ARM Streamer: print out tag namesSaleem Abdulrasool2014-01-07
* ARM IAS: improve .eabi_attribute handlingSaleem Abdulrasool2014-01-07
* MCParser: introduce Note and use it for ARM AsmParserSaleem Abdulrasool2014-01-07
* [Sparc] Add support for parsing memory operands in sparc AsmParser.Venkatraman Govindaraju2014-01-07
* [Mips] TargetStreamer Support for .abicalls and .set pic0.Jack Carter2014-01-06
* Remove dead code.Rafael Espindola2014-01-06
* ARM MachO: sort out isTargetDarwin/isTargetIOS/... checks.Tim Northover2014-01-06
* XCore Target: correct callee save register spilling when callsUnwindInit is t...Robert Lytton2014-01-06
* XCore target: Lower EH_RETURNRobert Lytton2014-01-06
* XCore target: Lower FRAME_TO_ARGS_OFFSETRobert Lytton2014-01-06
* XCore target: Lower RETURNADDRRobert Lytton2014-01-06
* XCore target: Optimise entsp / retsp selectionRobert Lytton2014-01-06
* XCore target: Refactor LR handlingRobert Lytton2014-01-06
* XCore target: Refactor the loading of constants into a registerRobert Lytton2014-01-06