summaryrefslogtreecommitdiff
path: root/lib
Commit message (Expand)AuthorAge
* Adding multiple object support to MCJIT EH frame handlingAndrew Kaylor2013-10-11
* Fix typoMatt Arsenault2013-10-11
* fConversion: Attempt #2 at fixing the MSVC build.Benjamin Kramer2013-10-11
* IfConversion: Try to unbreak the MSVC build.Benjamin Kramer2013-10-11
* Mips: Disassemble sign-extended 64 bit immediates properly.Benjamin Kramer2013-10-11
* Remove kill flags after if conversion if necessaryMatthias Braun2013-10-11
* [DAGCombiner] Reapply load slicing (192471) with a test that explicitly set s...Quentin Colombet2013-10-11
* [DAGCombiner] Revert load slicing (r192471), until I figure out why it fails ...Quentin Colombet2013-10-11
* [DAGCombiner] Slice a big load in two loads when the element are next to eachQuentin Colombet2013-10-11
* Better info when debugging vectorizerRenato Golin2013-10-11
* [ARM] Fix FP ABI attributes with no VFP enabled.Amara Emerson2013-10-11
* fix typo in commentMatthias Braun2013-10-11
* This reverts 192447 because of compiler warning generated on darwin build.Matheus Almeida2013-10-11
* This reverts r192449 because of compiler warning generated on darwin build.Matheus Almeida2013-10-11
* [mips][msa] Direct Object Emission for the majority of the ELM instructions.Matheus Almeida2013-10-11
* [mips][msa] Direct Object Emission of INSERT.{B,H,W} instruction.Matheus Almeida2013-10-11
* [NVPTX] Switch from StrongPHIElimination to PHIElimination in NVPTXTargetMach...Justin Holewinski2013-10-11
* Make AsmPrinter::emitImplicitDef a virtual method so targets can emit custom ...Justin Holewinski2013-10-11
* [mips][msa] Added support for matching maddv.[bhwd], and msubv.[bhwd] from no...Daniel Sanders2013-10-11
* [mips][msa] Added support for matching fmsub.[wd] from normal IR (i.e. not in...Daniel Sanders2013-10-11
* XCore target fix bug in emitArrayBound() causing segmentation faultRobert Lytton2013-10-11
* XCore target does not emit '.hidden' or '.protected' attributesRobert Lytton2013-10-11
* XCore target: fix bug in XCoreLowerThreadLocal.cppRobert Lytton2013-10-11
* XCore target: add XCoreTargetLowering::isZExtFree()Robert Lytton2013-10-11
* [mips][msa] Added support for matching fmadd.[wd] from normal IR (i.e. not in...Daniel Sanders2013-10-11
* [mips][msa] Added support for matching ffint_[us].[wd], and ftrunc_[us].[wd] ...Daniel Sanders2013-10-11
* LiveRangeCalc.h: Update a description corresponding to r192396. [-Wdocumentat...NAKAMURA Takumi2013-10-11
* Implement aarch64 neon instruction set AdvSIMD (copy).Kevin Qin2013-10-11
* Fix typoMatt Arsenault2013-10-10
* Print register in LiveInterval::print()Matthias Braun2013-10-10
* Represent RegUnit liveness with LiveRange instanceMatthias Braun2013-10-10
* Work on LiveRange instead of LiveInterval where possibleMatthias Braun2013-10-10
* Change MachineVerifier to work on LiveRange + LiveIntervalMatthias Braun2013-10-10
* Pass LiveQueryResult by valueMatthias Braun2013-10-10
* Refactor LiveInterval: introduce new LiveRange classMatthias Braun2013-10-10
* Rename LiveRange to LiveInterval::SegmentMatthias Braun2013-10-10
* Rename parameter: defined regs are not incoming.Matthias Braun2013-10-10
* Use getPointerSizeInBits() rather than 8 * getPointerSize()Matt Arsenault2013-10-10
* Debug Info: In DIBuilder, the context field of subprogram is updated to useManman Ren2013-10-10
* R600: Fix trunc i64 to i32 on SIMatt Arsenault2013-10-10
* R600/SI: Implement SIInstrInfo::verifyInstruction() for VOP*Tom Stellard2013-10-10
* R600/SI: Define a separate MIMG instruction for each possible output value typeTom Stellard2013-10-10
* R600/SI: Mark the EXEC register as reservedTom Stellard2013-10-10
* R600: Use StructurizeCFGPass for non SI targetsTom Stellard2013-10-10
* Implement AArch64 vector load/store multiple N-element structure class SIMD(l...Hao Liu2013-10-10
* Revert "Implement AArch64 vector load/store multiple N-element structure clas...Rafael Espindola2013-10-10
* Implement AArch64 vector load/store multiple N-element structure class SIMD(l...Hao Liu2013-10-10
* ARM: Put isV8EligibleForIT into the llvm namespace. While there make it inline.Benjamin Kramer2013-10-10
* ARM: correct liveness flags during ARMLoadStoreOptTim Northover2013-10-10
* Allow non-AVX form of pmovmskb to take a GR64 operand.Craig Topper2013-10-10