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* ScalarEvolution: Analyze trip count of loops with a switch guarding the exit.Benjamin Kramer2014-02-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201159 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach the DAGCombiner how to fold concat_vector nodes when the input is twoRobert Lougher2014-02-11
| | | | | | | | | | | | | | | BUILD_VECTOR nodes, e.g.: (concat_vectors (BUILD_VECTOR a1, a2, a3, a4), (BUILD_VECTOR b1, b2, b3, b4)) -> (BUILD_VECTOR a1, a2, a3, a4, b1, b2, b3, b4) This fixes an issue with AVX, where a sequence was not recognized as a 256-bit vbroadcast due to the concat_vectors. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201158 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Add missing PCRel relocations for AArch64 in RuntimeDyldELFBradley Smith2014-02-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201149 91177308-0d34-0410-b5e6-96231b3b80d8
* [LPM] Switch LICM to actively use LCSSA in addition to preserving it.Chandler Carruth2014-02-11
| | | | | | | | | | | | | | | | | | | | | | | Fixes PR18753 and PR18782. This is necessary for LICM to preserve LCSSA correctly and efficiently. There is still some active discussion about whether we should be using LCSSA, but we can't just immediately stop using it and we *need* LICM to preserve it while we are using it. We can restore the old SSAUpdater driven code if and when there is a serious effort to remove the reliance on LCSSA from all of the loop passes. However, this also serves as a great example of why LCSSA is very nice to have. This change significantly simplifies the process of sinking instructions for LICM, and makes it quite a bit less expensive. It wouldn't even be as complex as it is except that I had to start the process of removing the big recursive LCSSA formation hammer in order to switch even this much of the re-forming code to asserting that LCSSA was preserved. I'll fully remove that next just to tidy things up until the LCSSA debate settles one way or the other. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201148 91177308-0d34-0410-b5e6-96231b3b80d8
* XCore target: fix const section handlingRobert Lytton2014-02-11
| | | | | | | | | | | | Xcore target ABI requires const data that is externally visible to be handled differently if it has C-language linkage rather than C++ language linkage. Clang now emits ".cp.rodata" section information. All other externally visible constant data will be placed in the DP section. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201144 91177308-0d34-0410-b5e6-96231b3b80d8
* XCore target: Lower ATOMIC_LOAD & ATOMIC_STORERobert Lytton2014-02-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201143 91177308-0d34-0410-b5e6-96231b3b80d8
* AVX: fixed a bug in LowerVECTOR_SHUFFLEElena Demikhovsky2014-02-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201140 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove TimeValue::toPosixTime() -- it is buggy, semantics are unclear, and itsDmitri Gribenko2014-02-11
| | | | | | | only current user should be using toEpochTime() instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201136 91177308-0d34-0410-b5e6-96231b3b80d8
* AVX-512: Optimized BUILD_VECTOR pattern; Elena Demikhovsky2014-02-11
| | | | | | | fixed encoding of VEXTRACTPS instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201134 91177308-0d34-0410-b5e6-96231b3b80d8
* In RuntimeDyldImpl::emitSection, make Allocate (section size to be allocated) aLang Hames2014-02-11
| | | | | | | | | | | | | | | uintptr_t. An unsigned could overflow for large sections. No test case - anything big enough to overflow an unsigned is going to take an appreciable time to zero when the test passes. The choice of uintptr_t was made to match the RTDyldMemoryManager APIs, but these should probably be hardcoded to uint64_ts: It is legitimate to JIT for 64-bit targets from a 32-bit host/compiler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201127 91177308-0d34-0410-b5e6-96231b3b80d8
* Using the helper API for random number generation.Aaron Ballman2014-02-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201125 91177308-0d34-0410-b5e6-96231b3b80d8
* Hopefully fixing the MinGW 32 build, which was broken by r200767. Not using ↵Aaron Ballman2014-02-11
| | | | | | rand_s() since MinGW does not have an implementation for it, but instead using the underlying CryptGenRandom APIs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201124 91177308-0d34-0410-b5e6-96231b3b80d8
* [CodeGenPrepare] Undo changes that happened for the profitability check.Quentin Colombet2014-02-11
| | | | | | | | | | | | | | | | | | The addressing mode matcher checks at some point the profitability of folding an instruction into the addressing mode. When the instruction to be folded has several uses, it checks that the instruction can be folded in each use. To do so, it creates a new matcher for each use and check if the instruction is in the list of the matched instructions of this new matcher. The new matchers may promote some instructions and this has to be undone to keep the state of the original matcher consistent. A test case will follow. <rdar://problem/16020230> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201121 91177308-0d34-0410-b5e6-96231b3b80d8
* DebugInfo: Use existing symbol rather than creating it again.David Blaikie2014-02-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201119 91177308-0d34-0410-b5e6-96231b3b80d8
* [Stackmaps] Cleanup code. No functional change intended.Juergen Ributzka2014-02-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201115 91177308-0d34-0410-b5e6-96231b3b80d8
* LTO API: add lto_module_create_from_memory_with_path.Manman Ren2014-02-10
| | | | | | | | | | | | | | This function adds an extra path argument to lto_module_create_from_memory. The path argument will be passed to makeBuffer to make sure the MemoryBuffer has a name and the created module has a module identifier. This is mainly for emitting warning messages from the linker. When we emit warning message on a module, we can use the module identifier. rdar://15985737 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201114 91177308-0d34-0410-b5e6-96231b3b80d8
* Mark the methods in the Mangler const.Rafael Espindola2014-02-10
| | | | | | | | | A const ObjectFile needs to be able to provide its name. For an IRObjectFile, that means being able to call the mangler. Since each IRObjectFile can have a different mangling, it is natural for them to contain a Mangler which is therefore also const. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201113 91177308-0d34-0410-b5e6-96231b3b80d8
* Change the begin and end methods in ObjectFile to match the style guide.Rafael Espindola2014-02-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201108 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Implement isTruncateFreeMatt Arsenault2014-02-10
| | | | | | | Truncation is just accessing a subregister for any multiple of the register size, so it's free. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201107 91177308-0d34-0410-b5e6-96231b3b80d8
* [LPM] A terribly simple fix to a terribly complex bug: PR18773.Chandler Carruth2014-02-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The crux of the issue is that LCSSA doesn't preserve stateful alias analyses. Before r200067, LICM didn't cause LCSSA to run in the LTO pass manager, where LICM runs essentially without any of the other loop passes. As a consequence the globalmodref-aa pass run before that loop pass manager was able to survive the loop pass manager and be used by DSE to eliminate stores in the function called from the loop body in Adobe-C++/loop_unroll (and similar patterns in other benchmarks). When LICM was taught to preserve LCSSA it had to require it as well. This caused it to be run in the loop pass manager and because it did not preserve AA, the stateful AA was lost. Most of LLVM's AA isn't stateful and so this didn't manifest in most cases. Also, in most cases LCSSA was already running, and so there was no interesting change. The real kicker is that LCSSA by its definition (injecting PHI nodes only) trivially preserves AA! All we need to do is mark it, and then everything goes back to working as intended. It probably was blocking some other weird cases of stateful AA but the only one I have is a 1000-line IR test case from loop_unroll, so I don't really have a good test case here. Hopefully this fixes the regressions on performance that have been seen since that revision. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201104 91177308-0d34-0410-b5e6-96231b3b80d8
* Copy the ThreadLocalMode in GlobalVariable::copyAttributesFromHans Wennborg2014-02-10
| | | | | | This fixes the oversight from r159077. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201098 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: Initialize M0 and emit S_WQM_B64 whenever DS instructions are usedTom Stellard2014-02-10
| | | | | | | | | | | DS instructions that access local memory can only uses addresses that are less than or equal to the value of M0. When M0 is uninitialized, then we experience undefined behavior. This patch also changes the behavior to emit S_WQM_B64 on pixel shaders no matter what kind of DS instruction is used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201097 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: Only use S_WQM_B64 in pixel shadersTom Stellard2014-02-10
| | | | | | | | This doesn't change any functionality, since we only have two shader types (compute and pixel) that use local memory. We're just changing the logic to match the documentation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201096 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove some prototype code accidentally committed in r201043David Blaikie2014-02-10
| | | | | | Thanks to Chandler for the catch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201095 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: use natural LLVM IR for vshll instructionsTim Northover2014-02-10
| | | | | | | | Similarly to the vshrn instructions, these are simple zext/sext + trunc operations. Using normal LLVM IR should allow for better code, and more sharing with the AArch64 backend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201093 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Handle aliases of conditional branches without b.pred form.Chad Rosier2014-02-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201091 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: r12 is callee-saved for interrupt handlersOliver Stannard2014-02-10
| | | | | | | | | For A- and R-class processors, r12 is not normally callee-saved, but is for interrupt handlers. See AAPCS, 5.3.1.1, "Use of IP by the linker". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201089 91177308-0d34-0410-b5e6-96231b3b80d8
* Make succ_iterator a real random access iterator and clean up a couple of users.Benjamin Kramer2014-02-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201088 91177308-0d34-0410-b5e6-96231b3b80d8
* GlobalsModRef: Unify and clean up duplicated pointer analysis code.Benjamin Kramer2014-02-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201087 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: use LLVM IR to represent the vshrn operationTim Northover2014-02-10
| | | | | | | | | | vshrn is just the combination of a right shift and a truncate (and the limits on the immediate value actually mean the signedness of the shift doesn't matter). Using that representation allows us to get rid of an ARM-specific intrinsic, share more code with AArch64 and hopefully get better code out of the mid-end optimisers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201085 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips][msa] Add DLSA instruction.Matheus Almeida2014-02-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201081 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips][msa] Make LSA_DESC a parameterizable class.Matheus Almeida2014-02-10
| | | | | | | | | | This way it's possible to share the instruction's description for LSA and DLSA (to be added). No functional changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201078 91177308-0d34-0410-b5e6-96231b3b80d8
* [CMake] LLVMSupport should be responsible to provide system_libs.NAKAMURA Takumi2014-02-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201077 91177308-0d34-0410-b5e6-96231b3b80d8
* [asan] support for FreeBSD, LLVM part. patch by Viktor KutuzovKostya Serebryany2014-02-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201067 91177308-0d34-0410-b5e6-96231b3b80d8
* AVX-512: Fixed extract_vector_elt for v16i1 and v8i1 vectors.Elena Demikhovsky2014-02-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201066 91177308-0d34-0410-b5e6-96231b3b80d8
* Recommit r201059 and r201060 with hopefully a fix for its original failure.Craig Topper2014-02-10
| | | | | | | | | | | | Original commits messages: Add MRMXr/MRMXm form to X86 for use by instructions which treat the 'reg' field of modrm byte as a don't care value. Will allow for simplification of disassembler code. Simplify a bunch of code by removing the need for the x86 disassembler table builder to know about extended opcodes. The modrm forms are sufficient to convey the information. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201065 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r201059 and r201060.Bob Wilson2014-02-10
| | | | | | | | r201059 appears to cause a crash in a bootstrapped build of clang. Craig isn't available to look at it right now, so I'm reverting it while he investigates. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201064 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64]Implement the copy of two FPR8 registers by using FMOVss of two ↵Hao Liu2014-02-10
| | | | | | FPR32 registers in copyPhysReg. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201061 91177308-0d34-0410-b5e6-96231b3b80d8
* Add MRMXr/MRMXm form to X86 for use by instructions which treat the 'reg' ↵Craig Topper2014-02-10
| | | | | | field of modrm byte as a don't care value. Will allow for simplification of disassembler code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201059 91177308-0d34-0410-b5e6-96231b3b80d8
* MCParser: add a single token lookaheadSaleem Abdulrasool2014-02-09
| | | | | | | Some of the more complex directive and macro handling for GAS compatibility requires lookahead. Add a single token lookahead in the MCAsmLexer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201058 91177308-0d34-0410-b5e6-96231b3b80d8
* AsmParser: Simplify code with ArrayRef.Benjamin Kramer2014-02-09
| | | | | | No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201055 91177308-0d34-0410-b5e6-96231b3b80d8
* AsmParser: Parse (and ignore) nested .macro definitions.Benjamin Kramer2014-02-09
| | | | | | | | | This enables a slightly odd feature of gas. The macro is defined when the outermost macro is instantiated. PR18599 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201045 91177308-0d34-0410-b5e6-96231b3b80d8
* Use a consistent argument order in TargetLoweringObjectFile.Rafael Espindola2014-02-09
| | | | | | | | | These methods normally call each other and it is really annoying if the arguments are in different order. The more common rule was that the arguments specific to call are first (GV, Encoding, Suffix) and the auxiliary objects (Mang, TM) come after. This patch changes the exceptions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201044 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix formatting introduced in r200941David Blaikie2014-02-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201043 91177308-0d34-0410-b5e6-96231b3b80d8
* LoopVectorizer: Keep track of conditional store basic blocksArnold Schwaighofer2014-02-08
| | | | | | | | | | | | | Before conditional store vectorization/unrolling we had only one vectorized/unrolled basic block. After adding support for conditional store vectorization this will not only be one block but multiple basic blocks. The last block would have the back-edge. I updated the code to use a vector of basic blocks instead of a single basic block and fixed the users to use the last entry in this vector. But, I forgot to add the basic blocks to this vector! Fixes PR18724. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201028 91177308-0d34-0410-b5e6-96231b3b80d8
* Pass the Mangler by reference.Rafael Espindola2014-02-08
| | | | | | | It is never null and it is not used in casts, so there is no reason to use a pointer. This matches how we pass TM. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201025 91177308-0d34-0410-b5e6-96231b3b80d8
* Add LLVM_OVERRIDE to a few declarations.Rafael Espindola2014-02-08
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201022 91177308-0d34-0410-b5e6-96231b3b80d8
* [Constant Hoisting] Fix insertion point for constant materialization.Juergen Ributzka2014-02-08
| | | | | | | | | | The bitcast instruction during constant materialization was not placed correcly in the presence of phi nodes. This commit fixes the insertion point to be in the idom instead. This fixes PR18768 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201009 91177308-0d34-0410-b5e6-96231b3b80d8
* [Constant Hoisting] Don't update the use list while traversing it - DOH!Juergen Ributzka2014-02-08
| | | | | | | | This fix first traverses the whole use list of the constant expression and keeps track of the instructions that need to be updated. Then perform the fixup afterwards. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201008 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove dead code.Rafael Espindola2014-02-07
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201006 91177308-0d34-0410-b5e6-96231b3b80d8
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