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* Add support for ELF PLT references for ARM MC asm printing. Adding aJim Grosbach2010-09-22
| | | | | | | | | | new VariantKind to the MCSymbolExpr seems like overkill, but I'm not sure there's a more straightforward way to get the printing difference captured. (i.e., x86 uses @PLT, ARM uses (PLT)). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114613 91177308-0d34-0410-b5e6-96231b3b80d8
* Enable a few additional asserts in MC instruction lowering.Jim Grosbach2010-09-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114601 91177308-0d34-0410-b5e6-96231b3b80d8
* A select between a constant and zero, when fed by a bit test, can be efficientlyOwen Anderson2010-09-22
| | | | | | | | lowered using a series of shifts. Fixes <rdar://problem/8285015>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114599 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PR8201: Update the code to call via X86::CALL64pcrel32 in the 64-bit case.Cameron Esfahani2010-09-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114597 91177308-0d34-0410-b5e6-96231b3b80d8
* Change VDUPLANE DAG combiner to just return the result instead of callingBob Wilson2010-09-22
| | | | | | | | | CombineTo to avoid putting the result on the worklist. I don't think it makes much difference for now, but it might help someday as we add more DAG combine optimizations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114595 91177308-0d34-0410-b5e6-96231b3b80d8
* Avoid some Mach-O specific alignment being done on ELF.Rafael Espindola2010-09-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114594 91177308-0d34-0410-b5e6-96231b3b80d8
* allow target-specific label suffixes, patch by Yuri Gribov!Chris Lattner2010-09-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114592 91177308-0d34-0410-b5e6-96231b3b80d8
* Combine both VMOVDRR(VMOVRRD) and VMOVRRD(VMOVDRR), instead of just doing oneBob Wilson2010-09-22
| | | | | | | | | of those. Refactor to share code for handling BUILD_VECTOR(VMOVRRD). I don't have a testcase that exercises this, but it seems like an obvious good thing to do. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114589 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach memdep about TBAA tags.Dan Gohman2010-09-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114588 91177308-0d34-0410-b5e6-96231b3b80d8
* Use DW_OP_fbreg when offset is based on frame register.Devang Patel2010-09-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114585 91177308-0d34-0410-b5e6-96231b3b80d8
* add FIXMEJim Grosbach2010-09-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114578 91177308-0d34-0410-b5e6-96231b3b80d8
* Temporarily work around new address lowering while I figure out whatEric Christopher2010-09-22
| | | | | | | needs to happen for darwin. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114577 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove a few commented out bitsJim Grosbach2010-09-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114576 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix typo and add a FIXME.Rafael Espindola2010-09-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114570 91177308-0d34-0410-b5e6-96231b3b80d8
* When moving zext/sext to be folded with a load, ignore the issue of whetherBob Wilson2010-09-22
| | | | | | | | | truncates are free only in the case where the extended type is legal but the load type is not. If both types are illegal, such as when they are too big, the load may not be legalized into an extended load. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114568 91177308-0d34-0410-b5e6-96231b3b80d8
* Add PrintSpecial() handling for in ARM MC instruction printer.Jim Grosbach2010-09-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114563 91177308-0d34-0410-b5e6-96231b3b80d8
* grammar tweakageJim Grosbach2010-09-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114561 91177308-0d34-0410-b5e6-96231b3b80d8
* remove trailing whitespaceJim Grosbach2010-09-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114560 91177308-0d34-0410-b5e6-96231b3b80d8
* CrashRecovery/Darwin: Override raise() as well so that crash recovery doesn'tDaniel Dunbar2010-09-22
| | | | | | | end up altering the thread on which crashes are done because of its use of Darwin's broken raise() implementation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114558 91177308-0d34-0410-b5e6-96231b3b80d8
* Correctly align bss.Rafael Espindola2010-09-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114556 91177308-0d34-0410-b5e6-96231b3b80d8
* Add MC instruction printer support for ARM and Thumb1 jump tables.Jim Grosbach2010-09-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114555 91177308-0d34-0410-b5e6-96231b3b80d8
* Attempt to fix llvm-gcc build. It was crashing when building gcov.o for anBob Wilson2010-09-22
| | | | | | | | | ARM cross-compiler on x86, because the MMO size did not match the type size. This fixes the MMO size and also the size of the stack object to match the type size. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114554 91177308-0d34-0410-b5e6-96231b3b80d8
* Add MC instruction printer support for TB[BH] style thumb2 jump tables.Jim Grosbach2010-09-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114553 91177308-0d34-0410-b5e6-96231b3b80d8
* Clean up comment.Jim Grosbach2010-09-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114550 91177308-0d34-0410-b5e6-96231b3b80d8
* fix rdar://8456371 - Handle commutable instructions written backward.Chris Lattner2010-09-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114536 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix an inconsistency in the x86 backend that led it to reject "calll foo" onChris Lattner2010-09-22
| | | | | | | | | | | | | x86-32: 32-bit calls were named "call" not "calll". 64-bit calls were correctly named "callq", so this only impacted x86-32. This fixes rdar://8456370 - llvm-mc rejects 'calll' This also exposes that mingw/64 is generating a 32-bit call instead of a 64-bit call, I will file a bugzilla. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114534 91177308-0d34-0410-b5e6-96231b3b80d8
* fix rdar://8456412 - llvm-mc crash in encoder on "mov %rdx, %cr8"Chris Lattner2010-09-22
| | | | | | | Teaching the code generator about CR8-15, how to rex them up, etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114533 91177308-0d34-0410-b5e6-96231b3b80d8
* fix rdar://8456417 - llvm-mc can't do basic mathChris Lattner2010-09-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114532 91177308-0d34-0410-b5e6-96231b3b80d8
* add the missing aliases for fp stack cmovs, rdar://8456391Chris Lattner2010-09-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114531 91177308-0d34-0410-b5e6-96231b3b80d8
* reimplement elf TLS support in terms of addressing modes, eliminating ↵Chris Lattner2010-09-22
| | | | | | SegmentBaseAddress. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114529 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix rdar://8456364 - llvm-mc rejects '%CS'Chris Lattner2010-09-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114528 91177308-0d34-0410-b5e6-96231b3b80d8
* fix rdar://8456389 - llvm-mc mismatch with 'as' on 'fstp'Chris Lattner2010-09-22
| | | | | | | | | | -This line, and those below, will be ignored-- M test/MC/AsmParser/X86/x86_instructions.s M lib/Target/X86/AsmParser/X86AsmParser.cpp git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114527 91177308-0d34-0410-b5e6-96231b3b80d8
* fix rdar://8456361 - llvm-mc rejects 'rep movsd'Chris Lattner2010-09-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114526 91177308-0d34-0410-b5e6-96231b3b80d8
* convert the last 4 X86ISD nodes that should have memoperands to have them.Chris Lattner2010-09-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114523 91177308-0d34-0410-b5e6-96231b3b80d8
* give X86ISD::FNSTCW16m a memoperand, since it touches memory. It onlyChris Lattner2010-09-22
| | | | | | | can access the stack due to how it is generated though. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114522 91177308-0d34-0410-b5e6-96231b3b80d8
* give FP_TO_INT16_IN_MEM and friends a memoperand. They are onlyChris Lattner2010-09-22
| | | | | | | used with stack slots, but hey, lets be safe. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114521 91177308-0d34-0410-b5e6-96231b3b80d8
* give VZEXT_LOAD a memory operand, it now works with segment registers.Chris Lattner2010-09-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114515 91177308-0d34-0410-b5e6-96231b3b80d8
* revert r114386 now that address modes work correctly, we get a niceChris Lattner2010-09-22
| | | | | | | call through gs-relative memory now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114510 91177308-0d34-0410-b5e6-96231b3b80d8
* give LCMPXCHG_DAG[8] a memory operand, allowing it to work with addrspace ↵Chris Lattner2010-09-21
| | | | | | 256/257 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114508 91177308-0d34-0410-b5e6-96231b3b80d8
* OptimizeCompareInstr should avoid iterating pass the beginning of the MBB ↵Evan Cheng2010-09-21
| | | | | | when the 'and' instruction is after the comparison. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114506 91177308-0d34-0410-b5e6-96231b3b80d8
* Add start of support for MC instruction printer of ARM jump tables. Filling inJim Grosbach2010-09-21
| | | | | | the rest of it is next up. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114500 91177308-0d34-0410-b5e6-96231b3b80d8
* Enable target-specific mul-lowering on ARM, even at -Os. Remove a test that ↵Owen Anderson2010-09-21
| | | | | | | | | this makes irrelevant, but add a new test for the new, improved functionality. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114494 91177308-0d34-0410-b5e6-96231b3b80d8
* Build the complement interval dupli after the split intervals instead ofJakob Stoklund Olesen2010-09-21
| | | | | | | | | | | | | creating it before and subtracting split ranges. This way, the SSA update code in LiveIntervalMap can properly create and use new phi values in dupli. Now it is possible to create split regions where a value escapes along two different CFG edges, creating phi values outside the split region. This is a work in progress and probably quite broken. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114492 91177308-0d34-0410-b5e6-96231b3b80d8
* reimplement support for GS and FS relative address space matchingChris Lattner2010-09-21
| | | | | | | | | | | | | | | | | | by having X86DAGToDAGISel::SelectAddr get passed in the parent node of the operand match (the load/store/atomic op) and having it get the address space from that, instead of having special FS/GS addr mode operations that require duplicating the entire instruction set to support. This makes FS and GS relative accesses *far* more predictable and work much better. It also simplifies the X86 backend a bit, more to come. There is still a pending issue with nodes like ISD::PREFETCH and X86ISD::FLD, which really should be MemSDNode's but aren't. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114491 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixed pr20314-2.c failure, added E, F, p constraint letters.John Thompson2010-09-21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114490 91177308-0d34-0410-b5e6-96231b3b80d8
* Rework passing parent pointers into complexpatterns, I forgotChris Lattner2010-09-21
| | | | | | | | | | that complex patterns are matched after the entire pattern has a structural match, therefore the NodeStack isn't in a useful state when the actual call to the matcher happens. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114489 91177308-0d34-0410-b5e6-96231b3b80d8
* Move a sign-extend or a zero-extend of a load to the same basic block as theBob Wilson2010-09-21
| | | | | | | | load when the type of the load is not legal, even if truncates are not free. The load is going to be legalized to an extending load anyway. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114488 91177308-0d34-0410-b5e6-96231b3b80d8
* Clarify a comment.Bob Wilson2010-09-21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114487 91177308-0d34-0410-b5e6-96231b3b80d8
* If only user of a vreg is an copy instruction to export copy of vreg out of ↵Devang Patel2010-09-21
| | | | | | | | | | | current basic block then insert DBG_VALUE so that debug value of the variable is also transfered to new vreg. Testcase is in r114476. This fixes radar 8412415. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114478 91177308-0d34-0410-b5e6-96231b3b80d8
* correct this logic.Chris Lattner2010-09-21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114474 91177308-0d34-0410-b5e6-96231b3b80d8
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