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Commit message (Expand)AuthorAge
* [PowerPC] Constrain base register in PPCRegisterInfo::resolveFrameIndexUlrich Weigand2014-06-27
* Rename loop unrolling and loop vectorizer metadata to have a common prefix.Eli Bendersky2014-06-25
* [PPC64] Fix PR20071 (fctiduz generated for targets lacking that instruction)Bill Schmidt2014-06-24
* [PowerPC] Allow stack frames without parameter save areaUlrich Weigand2014-06-23
* [PowerPC] Fix on-stack AltiVec arguments with 64-bit SVR4Ulrich Weigand2014-06-23
* [PowerPC] Fix small argument stack slot offset for LEUlrich Weigand2014-06-20
* Fix typosAlp Toker2014-06-19
* [PowerPC] Simplify and improve loading into TOC registerUlrich Weigand2014-06-18
* [PowerPC] Add back test case for absolute calls (removed in r211174)Ulrich Weigand2014-06-18
* [PowerPC] Do not use BLA with the 64-bit SVR4 ABIUlrich Weigand2014-06-18
* [PPC64] Fix PR19893 - improve code generation for local function addressesBill Schmidt2014-06-16
* IR: add "cmpxchg weak" variant to support permitted failure.Tim Northover2014-06-13
* [PPC64LE] Recognize shufflevector patterns for little endianBill Schmidt2014-06-10
* Reduce verbiage of lit.local.cfg filesAlp Toker2014-06-09
* [PPC64LE] Generate correct code for unaligned little-endian vector loadsBill Schmidt2014-06-09
* [PPC64LE] Generate correct little-endian code for v16i8 multiplyBill Schmidt2014-06-09
* [PPC64LE] Fix lowering of BUILD_VECTOR and SHUFFLE_VECTOR for little endianBill Schmidt2014-06-06
* [PPC64LE] Add test case for r210282 commitBill Schmidt2014-06-05
* [PPC] Use alias symbols in address computation.Rafael Espindola2014-05-29
* Add a test showing the ppc code sequence for getting a function pointer.Rafael Espindola2014-05-29
* Revert "[PPC] Use alias symbols in address computation."Hal Finkel2014-05-28
* [PATCH] Correct type used for VADD_SPLAT optimization on PowerPCBill Schmidt2014-05-27
* [PPC] Use alias symbols in address computation.Rafael Espindola2014-05-26
* [PowerPC] PR19796: Also match ISD::TargetConstant in isIntS16ImmediateAdam Nemet2014-05-20
* DebugInfo: Sure up subprogram variable list handling with more assertions and...David Blaikie2014-05-14
* [PowerPC] Add global named register supportHal Finkel2014-05-11
* [PowerPC] On PPC32, 128-bit shifts might be runtime callsHal Finkel2014-05-11
* [PowerPC] Fix rlwimi isel when mask is not constantHal Finkel2014-04-13
* [PowerPC] Implement some additional TLI callbacksHal Finkel2014-04-12
* Reenable use of TBAA during CodeGenHal Finkel2014-04-12
* Add the ability to use GEPs for address sinking in CGPHal Finkel2014-04-12
* [PowerPC] Add a full condition code register to make the "cc" clobber workHal Finkel2014-04-04
* [PowerPC] Add some missing VSX bitcast patternsHal Finkel2014-04-01
* [PowerPC] Don't ever expand BUILD_VECTOR of v2i64 with shufflesHal Finkel2014-03-31
* Look at shuffles of build_vectors in DAGCombiner::visitEXTRACT_VECTOR_ELTHal Finkel2014-03-31
* Make use of previously generated stores in SelectionDAGLegalize::ExpandExtrac...Hal Finkel2014-03-30
* [PowerPC] Handle VSX v2i64 SIGN_EXTEND_INREGHal Finkel2014-03-30
* [PowerPC] Handle v2i64 comparisonsHal Finkel2014-03-29
* [PowerPC] Add subregister classes for f64 VSX valuesHal Finkel2014-03-29
* [PowerPC] Fix VSX permutation iselHal Finkel2014-03-28
* [PowerPC] v2[fi]64 need to be explicitly passed in VSX registersHal Finkel2014-03-28
* [PowerPC] Use a small cleanup pass to remove VSX self copiesHal Finkel2014-03-27
* [PowerPC] Fix v2f64 vector extract and related patternsHal Finkel2014-03-27
* [PowerPC] Expand v2i64 shiftsHal Finkel2014-03-27
* [PowerPC] Generate VSX permutations for v2[fi]64 vectorsHal Finkel2014-03-26
* [PowerPC] VSX loads and stores support unaligned accessHal Finkel2014-03-26
* [PowerPC] Use v2f64 <-> v2i64 VSX conversion instructionsHal Finkel2014-03-26
* [PowerPC] Use VSX vector load/stores for v2[fi]64Hal Finkel2014-03-26
* [PowerPC] Add v2i64 as a legal VSX typeHal Finkel2014-03-26
* [PowerPC] Lower VSELECT using xxsel when VSX is availableHal Finkel2014-03-26