| Commit message (Expand) | Author | Age | |
|---|---|---|---|
| * | R600/SI: Print more immediates in hex format | Matt Arsenault | 2014-04-15 |
| * | R600: Implement isZExtFree. | Matt Arsenault | 2014-03-27 |
| * | R600/SI: Fix extra mov from legalizing 64-bit SALU ops. | Matt Arsenault | 2014-03-24 |
| * | R600/SI: Sub-optimial fix for 64-bit immediates with SALU ops. | Matt Arsenault | 2014-03-24 |
| * | R600/SI: Fix 64-bit bit ops that require the VALU. | Matt Arsenault | 2014-03-24 |
| * | R600/SI: Move instruction patterns to scalar versions. | Matt Arsenault | 2014-03-21 |
| * | R600/SI: Change formatting of printed registers. | Matt Arsenault | 2013-11-12 |
| * | R600: Fix handling of vector kernel arguments | Tom Stellard | 2013-10-23 |
| * | R600/SI: Add support for i64 bitwise or | Tom Stellard | 2013-10-23 |
| * | R600/SI: Use -verify-machineinstrs for most tests | Tom Stellard | 2013-10-10 |
| * | R600/SI: Expand or of v2i32/v4i32 for SI | Aaron Watry | 2013-06-25 |
| * | R600: Expand vector or, shl, srl, and xor nodes | Tom Stellard | 2013-05-03 |
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