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Commit message (Expand)AuthorAge
* Remove hard coded registers in ARM ldrexd and strexd instructionsWeiming Zhao2012-11-16
* Make sure FABS on v2f32 and v4f32 is legal on ARM NEONAnton Korobeynikov2012-11-16
* Fix handling of aliases to functions.Richard Osborne2012-11-16
* [NVPTX] Order global variables in def-use order before emiting them in the fi...Justin Holewinski2012-11-16
* llvm/test/CodeGen/X86/hipe-cc*.ll: Add explicit -mcpu, or they don't expect t...NAKAMURA Takumi2012-11-16
* Add the Erlang/HiPE calling convention, patch by Yiannis Tsiouris.Duncan Sands2012-11-16
* Use roundps/pd for llvm.ceil, llvm.trunc, llvm.rint, and llvm.nearbyint of ve...Craig Topper2012-11-16
* [mips] Fix delay slot filler so that instructions with register operand $1 areAkira Hatanaka2012-11-16
* Mark FP_ROUND for converting NEON v2f64 to v2f32 as expand. Add a missingEli Friedman2012-11-15
* PowerPC: Lowering floor intrinsic for AltivecAdhemerval Zanella2012-11-15
* This patch is in preparation for adding medium code model support to theBill Schmidt2012-11-14
* Make sure to not get AVX code on an AVX-capable host. Revealed in r167967.Jakub Staszak2012-11-14
* test/CodeGen/Hexagon/postinc-load.ll: Suppress it for now. It triggered the f...NAKAMURA Takumi2012-11-14
* Remove the CellSPU port.Eric Christopher2012-11-14
* llvm/test/CodeGen/X86/memset.ll: FileCheck-ize, and add another case on +avx.NAKAMURA Takumi2012-11-14
* Added multiclass for post-increment load instructions.Jyotsna Verma2012-11-14
* Force CPU in test so we don't accidentally get AVX code on an AVX-capable host.Benjamin Kramer2012-11-14
* X86: Enable SSE memory intrinsics even when stack alignment is less than 16 b...Benjamin Kramer2012-11-14
* The code pattern "imm0_255_neg" is used for checking if an immediate value is...Nadav Rotem2012-11-14
* [NVPTX] Implement custom lowering of loads/stores for i1Justin Holewinski2012-11-14
* Fix really stupid ARM EHABI info generation bug: we should not emitAnton Korobeynikov2012-11-14
* Handle DAG CSE adding new uses during ReplaceAllUsesWith. Fixes PR14333.Rafael Espindola2012-11-14
* Use TARGET2 relocation for TType references on ARM.Anton Korobeynikov2012-11-14
* Revert "Use the 'count' attribute instead of the 'upper_bound' attribute."Eric Christopher2012-11-13
* X86: when constructing VZEXT_LOAD from other loads, makes sure its outputManman Ren2012-11-13
* Do not consider a machine instruction that uses and defines the sameUlrich Weigand2012-11-13
* Codegen support for arbitrary vector getelementptrs.Duncan Sands2012-11-13
* Use the 'count' attribute instead of the 'upper_bound' attribute.Bill Wendling2012-11-13
* Cleanup the main RegisterCoalescer loop.Andrew Trick2012-11-13
* Fix test case added in patch fixing PR14314Michael Liao2012-11-12
* misched: Infrastructure for weak DAG edges.Andrew Trick2012-11-12
* Fix PR14314Michael Liao2012-11-12
* [NVPTX] Add more precise PTX/SM target attributesJustin Holewinski2012-11-12
* Convert an improper CodeGen test to a MC test.Evan Cheng2012-11-10
* xfail a bad test. This is a MC test but it's dependent on a codegen optimizat...Evan Cheng2012-11-10
* Disable the Thumb no-return call optimization:Evan Cheng2012-11-10
* Cleanup pcmp(e/i)str(m/i) instruction definitions and load folding support.Craig Topper2012-11-10
* [NVPTX] Use ABI alignment for parameters when alignment is not specified.Justin Holewinski2012-11-09
* Fix assertions in updateRegMaskSlots().Jakob Stoklund Olesen2012-11-09
* Recommit modified r167540.Amara Emerson2012-11-08
* Add support of RTM from TSX extensionMichael Liao2012-11-08
* [mips] Custom-lower ISD::FRAME_TO_ARGS_OFFSET node.Akira Hatanaka2012-11-07
* misched: Heuristics based on the machine model.Andrew Trick2012-11-07
* On PowerPC64, integer return values (as well as arguments) are supposedUlrich Weigand2012-11-05
* Add support for the PowerPC-specific inline asm Z constraint and y modifier.Hal Finkel2012-11-05
* [PATCH] PowerPC: Expand load extend vector operationsAdhemerval Zanella2012-11-05
* [mips] Set flag neverHasSideEffects flag on floating point conversionAkira Hatanaka2012-11-03
* [mips] Set flag isAsCheapAsAMove flag on instruction LUi.Akira Hatanaka2012-11-03
* [mips] Stop reserving register AT and use register scavenger when a scratchAkira Hatanaka2012-11-03
* [mips] Fix bug in test case. Disable machine LICM to prevent instruction fromAkira Hatanaka2012-11-02
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