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* Add -mtriple=x86_64-linux to this test case to fix the build bots.5Kevin Enderby2014-03-13
* Fix for http://llvm.org/bugs/show_bug.cgi?id=18590Ekaterina Romanova2014-03-13
* R600: LDS instructions shouldn't implicitly define OQAPTom Stellard2014-03-13
* Cleanup: Remove use of old "-enable-correct-eh-support" option from a testMark Seaborn2014-03-13
* [ARM] Use symbolic register names in .cfi directives only with IAS (PR19110)Hans Wennborg2014-03-13
* CodeGenPrep: sink extends of illegal types into use block.Manuel Jacob2014-03-13
* AVX-512: masked load/store + intrinsics for them.Elena Demikhovsky2014-03-13
* [PowerPC] Initial support for the VSX instruction setHal Finkel2014-03-13
* [X86] Add peephole for masked rotate amountAdam Nemet2014-03-12
* Reject alias to undefined symbols in the verifier.Rafael Espindola2014-03-12
* R600: Fix trunc store from i64 to i1Matt Arsenault2014-03-12
* [mips] BSEL's and BINS[RL] operands are reversed compared to the vselect node...Daniel Sanders2014-03-12
* ARM: correct Dwarf output for non-contiguous VFP saves.Tim Northover2014-03-12
* [ARM] Use DWARF register numbers for CFI directives in ELF assemblyHans Wennborg2014-03-12
* X86: Don't generate 64-bit movd after cmpneqsd in 32-bit mode (PR19059)Hans Wennborg2014-03-11
* ARM: honour -f{no-,}optimize-sibling-callsSaleem Abdulrasool2014-03-11
* ARM: remove ancient -arm-tail-calls optionSaleem Abdulrasool2014-03-11
* ARM: enable tail call optimisation on Thumb 2Saleem Abdulrasool2014-03-11
* IR: add a second ordering operand to cmpxhg for failureTim Northover2014-03-11
* X86: Enable ISel of 16-bit MOVBE instructions.Jim Grosbach2014-03-11
* Fix undefined behavior in vector shift tests.Matt Arsenault2014-03-11
* Followup to r203483 - add test.Eli Bendersky2014-03-10
* [mips] Implement NaCl sandboxing of loads, stores and SP changes:Sasa Stankovic2014-03-10
* Fix regression with -O0 for mips .Reed Kotler2014-03-10
* AArch64: fix LowerCONCAT_VECTORS for new CodeGen.Tim Northover2014-03-10
* Revert r203230, "CodeGenPrep: sink extends of illegal types into use block."NAKAMURA Takumi2014-03-09
* IR: Change inalloca's grammar a bitDavid Majnemer2014-03-09
* Update comment from r203315 based on reviewAdam Nemet2014-03-08
* DebugInfo: further improvements to test following up on r203329David Blaikie2014-03-08
* DebugInfo: Fix test fallout from r203323David Blaikie2014-03-08
* [DAGCombiner] Recognize another rotation idiomAdam Nemet2014-03-07
* ISel: Make VSELECT selection terminate in cases where the condition type has toArnold Schwaighofer2014-03-07
* Moved test file from test/MC/Mips to test/CodeGen/Mips.Sasa Stankovic2014-03-07
* R600/SI: Using SGPRs is illegal for instructions that read carry-out from VCCTom Stellard2014-03-07
* R600/SI: Custom lower i1 storesTom Stellard2014-03-07
* CodeGenPrep: sink extends of illegal types into use block.Tim Northover2014-03-07
* Replace PROLOG_LABEL with a new CFI_INSTRUCTION.Rafael Espindola2014-03-07
* Remove shouldEmitUsedDirectiveFor.Rafael Espindola2014-03-06
* Convert test to FileCheck.Rafael Espindola2014-03-06
* [X86] Teach the DAGCombiner how to fold a OR of two shufflevector nodes.Andrea Di Biagio2014-03-06
* R600: Fix extloads from i8 / i16 to i64.Matt Arsenault2014-03-06
* R600/SI: Expand selects on vectors.Matt Arsenault2014-03-06
* [XCore] Add support for the "m" inline asm constraint.Richard Osborne2014-03-06
* [AArch64] This is a work in progress to provide a machine descriptionChad Rosier2014-03-06
* Fixup PPC Darwin i1 argument handlingHal Finkel2014-03-06
* When using CR bit registers on PPC32, handle the i1 vaarg caseHal Finkel2014-03-06
* [Mips] Testcase typo fix. No functionality change.Jack Carter2014-03-05
* With PPC CR bit registers, handle int_to_fp on older coresHal Finkel2014-03-05
* Always print the implicit .text at the start of an asm file.Rafael Espindola2014-03-05
* Lower AVX v4i64->v4i32 truncate to one shuffle.Cameron McInally2014-03-05