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Commit message (Expand)AuthorAge
* R600/SI: Initialize M0 and emit S_WQM_B64 whenever DS instructions are usedTom Stellard2014-02-10
* ARM: use natural LLVM IR for vshll instructionsTim Northover2014-02-10
* ARM: r12 is callee-saved for interrupt handlersOliver Stannard2014-02-10
* ARM: use LLVM IR to represent the vshrn operationTim Northover2014-02-10
* Test commit - added a new line to vec_shuf-insert.ll.Robert Lougher2014-02-10
* [mips][msa] Add DLSA instruction.Matheus Almeida2014-02-10
* [mips][msa] Update FileCheck prefix in preparation forMatheus Almeida2014-02-10
* AVX-512: Fixed extract_vector_elt for v16i1 and v8i1 vectors.Elena Demikhovsky2014-02-10
* [AArch64]Implement the copy of two FPR8 registers by using FMOVss of two FPR3...Hao Liu2014-02-10
* Always create a temporary symbol to use with the cfi frame.Rafael Espindola2014-02-07
* Use FileCheck variables to simplify this test.Rafael Espindola2014-02-07
* Fix Darwin bots from EHABI changeRenato Golin2014-02-07
* R600/SI: Add failing test for 3 x i64 vectors.Matt Arsenault2014-02-07
* Remove -arm-disable-ehabi optionRenato Golin2014-02-07
* [mips] Forbid the use of registers t6, t7 and t8 if the target is NaCl.Sasa Stankovic2014-02-07
* Fix a bug with .weak_def_can_be_hidden: Mutable variables cannot use it.Rafael Espindola2014-02-07
* LLVM-1163: AAPCS-VFP violation when CPRC allocated to stackOliver Stannard2014-02-07
* [Sparc] Emit relocations for Thread Local Storage (TLS) when integrated assem...Venkatraman Govindaraju2014-02-07
* [Sparc] Emit correct relocations for PIC code when integrated assembler is used.Venkatraman Govindaraju2014-02-07
* PGO branch weight: fix PR18752.Manman Ren2014-02-07
* X86: Resolve a long standing FIXME and properly isel pextr[bw].Jim Grosbach2014-02-07
* Convert test to FileCheck.Rafael Espindola2014-02-06
* [CodeGenPrepare] Move away sign extensions that get in the way of addressingQuentin Colombet2014-02-06
* R600/SI: Add a MUBUF store pattern for Reg+Imm offsetsTom Stellard2014-02-06
* R600/SI: Add a MUBUF store pattern for Imm offsetsTom Stellard2014-02-06
* R600/SI: Add a MUBUF load pattern for Reg+Imm offsetsTom Stellard2014-02-06
* R600/SI: Use immediates offsets for SMRD instructions whenever possibleTom Stellard2014-02-06
* [DAG] Don't pull the binary operation though the shift if the operands have o...Juergen Ributzka2014-02-06
* [RegAlloc] Add a last chance recoloring mechanism when everything else failed toQuentin Colombet2014-02-05
* Remove support for not using .loc directives.Rafael Espindola2014-02-05
* [mips] Add NaCl target and forbid indexed loads and stores for itPetar Jovanovic2014-02-05
* AVX-512: optimized icmp -> sext -> icmp patternElena Demikhovsky2014-02-05
* R600/SI: Add pattern for zero-extending i1 to i32Michel Danzer2014-02-05
* AVX-512: Added intrinsic for cvtph2ps.Elena Demikhovsky2014-02-05
* Fix PR18345: ldr= pseudo instruction produces incorrect code when using in in...David Peixotto2014-02-04
* R600/SI: Custom lower i64 ISD::SELECTTom Stellard2014-02-04
* R600: Enable vector fpow.Tom Stellard2014-02-04
* ARM & AArch64: merge NEON absolute compare intrinsicsTim Northover2014-02-04
* ARM: fix fast-isel assertion failureTim Northover2014-02-04
* R600/SI: Fix fneg for 0.0Michel Danzer2014-02-04
* DebugInfo: Remove some unneeded conditionals now that DIBuilder no longer emi...David Blaikie2014-02-04
* AArch64 & ARM: refactor crypto intrinsics to take scalarsTim Northover2014-02-03
* Expand vector bswap in LegalizeVectorOpsHal Finkel2014-02-03
* Add some xfailed R600 tests for 64-bit private accesses.Matt Arsenault2014-02-02
* R600/SI: Fix insertelement with dynamic indices.Matt Arsenault2014-02-02
* [Sparc] Set %o7 as the return address register instead of %i7 in MCRegisterIn...Venkatraman Govindaraju2014-02-01
* [stackprotector] Implement the sspstrong rules for stack layout.Josh Magee2014-02-01
* Implement inalloca codegen for x86 with the new inalloca designReid Kleckner2014-01-31
* Don't put non-static allocas in the static alloca mapReid Kleckner2014-01-31
* Set -mcpu to make this test pass on atom botsReid Kleckner2014-01-31
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