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path: root/test/MC/Disassembler/ARM
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* This reverts r155000.Joey Gouly2013-06-20
* ARM: add operands pre-writeback variants when neededAmaury de la Vieuville2013-06-18
* ARM: fix thumb literal loads decodingAmaury de la Vieuville2013-06-18
* ARM: thumb stores cannot use PC as dest registerAmaury de la Vieuville2013-06-18
* ARM: fix thumb coprocessor instruction with pre-writeback disassemblyAmaury de la Vieuville2013-06-14
* ARM: fix B decodingAmaury de la Vieuville2013-06-13
* This patch adds support for FPINST/FPINST2 as operands to vmsr/vmrs. These ar...Mihai Popa2013-06-11
* ARM: Enforce decoding rules for VLDn instructionsAmaury de la Vieuville2013-06-11
* ARM: Fix STREX/LDREX reecodingAmaury de la Vieuville2013-06-11
* ARM: ISB cannot be passed the same options as DMBAmaury de la Vieuville2013-06-10
* ARM: fix VMOVvnf32 decoding when ambiguous with VCVTAmaury de la Vieuville2013-06-08
* ARM: enforce SRS decoding constraintsAmaury de la Vieuville2013-06-08
* ARM: fix CPS decoding when ambiguous with QADDAmaury de la Vieuville2013-06-08
* ARM: fix VCVT decodingAmaury de la Vieuville2013-06-08
* This is a simple patch that changes RRX and RRXS to accept all registers as o...Mihai Popa2013-06-05
* ARM: add fstmx and fldmx instructions for assemblyTim Northover2013-05-31
* ARM: fix VEXT encoding corner caseTim Northover2013-05-31
* VSTn instructions have a number of encoding constraints which are not impleme...Mihai Popa2013-05-20
* Q registers are encoded in fields of the same length as D registers. As Q reg...Mihai Popa2013-05-20
* The purpose of the patch is to fix the syntax of ARM mrc and mrc2 instruction...Mihai Popa2013-05-13
* s tightens up the encoding description for ARM post-indexed ldr instructions....Mihai Popa2013-04-30
* ARM: Fix encoding of hint instruction for Thumb.Quentin Colombet2013-04-26
* ARM: Permit "sp" in ARM variant of STREXD instructionsTim Northover2013-04-19
* ARM: permit "sp" in ARM variants of MOVW/MOVT instructionsTim Northover2013-04-19
* ARM: Correct printing of pre-indexed operands.Quentin Colombet2013-04-12
* ARM: Make "SMC" instructions conditional on new TrustZone architecture feature.Tim Northover2013-04-10
* Fix issue with disassembler decoding CBZ/CBNZ immediates as negatives when th...Gordon Keiser2013-03-28
* Patch by Gordon Keiser!Joe Abbey2013-03-26
* Make ARMAsmPrinter generate the correct alignment specifier syntax in instruc...Kristof Beyls2013-02-22
* Make ARMAsmParser accept the correct alignment specifier syntax in instructions.Kristof Beyls2013-02-14
* Added a option to the disassembler to print immediates as hex.Kevin Enderby2012-12-05
* Fixed the arm disassembly of invalid BFI instructions to not build a bad MCInstKevin Enderby2012-11-29
* ARM: Better disassembly for pc-relative LDR.Jim Grosbach2012-10-30
* Fix ARM's b.w instruction for thumb 2 and the encoding T4. The branch targetKevin Enderby2012-10-29
* Add support for annotated disassembly output for X86 and arm.Kevin Enderby2012-10-22
* Diagnose invalid alignments on duplicating VLDn instructions.Tim Northover2012-09-06
* Check for invalid alignment values when decoding VLDn/VSTn (single ln) instru...Tim Northover2012-09-06
* Use correct part of complex operand to encode VST1 alignment.Tim Northover2012-09-06
* ARM: Move Thumb2 tests to Thumb2 test file and fix CHECK lines.Jim Grosbach2012-08-13
* Fix #13035, a bug around Thumb instruction LDRD/STRD with negative #0 offset ...Jiangning Liu2012-08-02
* Fix #13138, a bug around ARM instruction DSB encoding and decoding issue.Jiangning Liu2012-08-02
* Fix #13241, a bug around shift immediate operand for ARM instruction ADR.Jiangning Liu2012-08-02
* Fix instruction description of VMOV (between two ARM core registers and two s...Richard Barton2012-07-10
* Fix the remaining TCL-style quotes found in the testsuite. This isChandler Carruth2012-07-02
* Convert the uses of '|&' to use '2>&1 |' instead, which works on oldChandler Carruth2012-07-02
* Convert all tests using TCL-style quoting to use shell-style quoting.Chandler Carruth2012-07-02
* Correct decoder for T1 conditional B encodingRichard Barton2012-06-06
* Added the missing bit definition for the 4th bit of the STR (post reg) instru...Silviu Baranga2012-05-11
* Fix issues with the ARM bl and blx thumb instructions and the J1 and J2 bitsKevin Enderby2012-05-03
* Fixed disassembler for vstm/vldm ARM VFP instructions.Silviu Baranga2012-05-03
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