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* AArch64/ARM64: enable more AArch64 tests on ARM64.Tim Northover2014-04-15
| | | | | | No code changes for this bunch, just some test rejigs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206291 91177308-0d34-0410-b5e6-96231b3b80d8
* AArch64/ARM64: add missing pattern for extending load.Tim Northover2014-04-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206290 91177308-0d34-0410-b5e6-96231b3b80d8
* AArch64/ARM64: only mangle MOVZ/MOVN during encoding when neededTim Northover2014-04-15
| | | | | | | | Sometimes we need emit the bits that would actually be a MOVN when producing a relocated MOVZ instruction (don't ask). But not always, a check which ARM64 got wrong until now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206289 91177308-0d34-0410-b5e6-96231b3b80d8
* AArch64/ARM64: add support for large code-model jump tables.Tim Northover2014-04-15
| | | | | | | I've left the MachO CodeGen as it is, there's a reasonable chance it should use the GOT like ConstPools, but I'm not certain. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206288 91177308-0d34-0410-b5e6-96231b3b80d8
* AArch64/ARM64: add patterns for various commutations of FNMADD.Tim Northover2014-04-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206287 91177308-0d34-0410-b5e6-96231b3b80d8
* AArch64/ARM64: add half as a storage type on ARM64.Tim Northover2014-04-15
| | | | | | | This brings it into line with the AArch64 behaviour and should open the way for certain OpenCL features. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206286 91177308-0d34-0410-b5e6-96231b3b80d8
* AArch64/ARM64: copy patterns for fixed-point conversionsTim Northover2014-04-15
| | | | | | | | Code is mostly copied directly across, with a slight extension of the ISelDAGToDAG function so that it can cope with the floating-point constants being behind a litpool. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206285 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM64: add constraints to various FastISel operationsTim Northover2014-04-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206284 91177308-0d34-0410-b5e6-96231b3b80d8
* AArch64/ARM64: add more arm64 lines to AArch64 regression testsTim Northover2014-04-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206282 91177308-0d34-0410-b5e6-96231b3b80d8
* AArch64/ARM64: add dp tests from AArch64Tim Northover2014-04-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206281 91177308-0d34-0410-b5e6-96231b3b80d8
* Optional hash symbol feature support for ARM64Stepan Dyatkovskiy2014-04-15
| | | | | | | | http://reviews.llvm.org/D3328 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206276 91177308-0d34-0410-b5e6-96231b3b80d8
* vect.omp.persistence.ll REQUIRES asserts due to -debug-only.NAKAMURA Takumi2014-04-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206271 91177308-0d34-0410-b5e6-96231b3b80d8
* D3348 - [BUG] "Rotate Loop" pass kills "llvm.vectorizer.enable" metadataAlexey Bataev2014-04-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206266 91177308-0d34-0410-b5e6-96231b3b80d8
* [MC] Emit an error if cfi_startproc is used before a symbol is defined.Quentin Colombet2014-04-15
| | | | | | | | | | Currently, we bind those directives with the last symbol, so if none has been defined, this would lead to a crash of the compiler. <rdar://problem/15939159> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206236 91177308-0d34-0410-b5e6-96231b3b80d8
* [Register Coalescer] Add a test case for 206060.Quentin Colombet2014-04-15
| | | | | | | <rdar://problem/16582185> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206235 91177308-0d34-0410-b5e6-96231b3b80d8
* Change argument order and add explanatory comment to r206130David Blaikie2014-04-14
| | | | | | Changes requested in code review by Eric Christopher of r206130. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206219 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "Revert r206045, "Fix shift by constants for vector.""Matt Arsenault2014-04-14
| | | | | | Fix cases where the Value itself is used, and not the constant value. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206214 91177308-0d34-0410-b5e6-96231b3b80d8
* Re-apply r206096 after investigating the gdb buildbot failure.Adrian Prantl2014-04-14
| | | | | | | | | | | | | | | Thanks to dblaikie for updating the testcase! Debug info: (bugfix) C++ C/Dtors can be compiled to multiple functions, therefore, their declaration cannot have one DW_AT_linkage_name. The specific instances however can and should have that attribute. This patch reorders the code in DwarfUnit::getOrCreateSubprogramDIE() to emit linkage names for C/Dtors. rdar://problem/16362674. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206210 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix for codegen bug that could cause illegal cmn instruction generationLouis Gerbarg2014-04-14
| | | | | | | | | | | In rare cases the dead definition elimination pass code can cause illegal cmn instructions when it replaces dead registers on instructions that use unmaterialized frame indexes. This patch disables the dead definition optimization for instructions which include frame index operands. rdar://16438284 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206208 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a flag to disable the ARM64DeadRegisterDefinitionsPassLouis Gerbarg2014-04-14
| | | | | | | This patch adds a -arm64-dead-def-elimination flag so that it is possible to disable dead definition elimination. Includes test case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206207 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a bug in which BranchProbabilityInfo wasn't setting branch weights of ↵Akira Hatanaka2014-04-14
| | | | | | | | | | | | | | basic blocks inside loops correctly. Previously, BranchProbabilityInfo::calcLoopBranchHeuristics would determine the weights of basic blocks inside loops even when it didn't have enough information to estimate the branch probabilities correctly. This patch fixes the function to exit early if it doesn't see any exit edges or back edges and let the later heuristics determine the weights. This fixes PR18705 and <rdar://problem/15991090>. Differential Revision: http://reviews.llvm.org/D3363 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206194 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix 2008-03-05-SxtInRegBug.ll so that the CHECK-NOT will not match the filename.Richard Trieu2014-04-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206193 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix up MCFixup::getAccessVariant to handle unary expressions.Kaelyn Takata2014-04-14
| | | | | | | | | | | | This allows correct relocations to be generated for a symbolic address that is being adjusted by a negative constant. Since r204294, such expressions have triggered undefined behavior when LLVM was built without assertions. Credit goes to Rafael for this patch; I'm submitting it on his behalf as he is on vacation this week. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206192 91177308-0d34-0410-b5e6-96231b3b80d8
* tools: fix heap-buffer-overrun detected via ASANSaleem Abdulrasool2014-04-14
| | | | | | | | | | Once the auxiliary fields relating to the filename have been inspected, any following auxiliary fields need not be visited as they have been consumed (the following fields comprise the filepath as a single unit). Adjust the test to catch this even if ASAN is not enabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206190 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Fix fcopysign for MIPS-IV and add the test.Daniel Sanders2014-04-14
| | | | | | | | | | | | | | | Summary: This was another incorrect use of hasMips64() vs isGP64bit(). Depends on D3344 Reviewers: matheusalmeida, vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D3347 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206187 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] MIPS-IV is broadly the same as MIPS64 so duplicate all -mcpu=mips64 ↵Daniel Sanders2014-04-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | tests with -mcpu=mips4 as a starting point Summary: Two exceptions to this: test/CodeGen/Mips/octeon.ll test/CodeGen/Mips/octeon_popcnt.ll these test extensions to MIPS64 One test is altered for MIPS-IV: test/CodeGen/Mips/mips64countleading.ll Tests dclo/dclz which were added in MIPS64. The MIPS-IV version tests that dclo/dclz are not emitted. Four tests fail and are not in this patch: test/CodeGen/Mips/abicalls.ll test/CodeGen/Mips/fcopysign-f32-f64.ll test/CodeGen/Mips/fcopysign.ll test/CodeGen/Mips/stack-alignment.ll Depends on D3343 Reviewers: matheusalmeida, vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D3344 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206185 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Fix more incorrect uses of HasMips64 and isMips64()Daniel Sanders2014-04-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: - Conditional moves acting on 64-bit GPR's should require MIPS-IV rather than MIPS64 - ISD::MUL, and ISD::MULH[US] should be lowered on all 64-bit ISA's Patch by David Chisnall His work was sponsored by: DARPA, AFRL I've added additional testcases to cover as much of the codegen changes affecting MIPS-IV as I can. Where I've been unable to find an existing MIPS64 testcase that can be re-used for MIPS-IV (mainly tests covering ISD::GlobalAddress and similar), I at least agree that MIPS-IV should behave like MIPS64. Further testcases that are fixed by this patch will follow in my next commit. The testcases from that commit that fail for MIPS-IV without this patch are: LLVM :: CodeGen/Mips/2010-07-20-Switch.ll LLVM :: CodeGen/Mips/cmov.ll LLVM :: CodeGen/Mips/eh-dwarf-cfa.ll LLVM :: CodeGen/Mips/largeimmprinting.ll LLVM :: CodeGen/Mips/longbranch.ll LLVM :: CodeGen/Mips/mips64-f128.ll LLVM :: CodeGen/Mips/mips64directive.ll LLVM :: CodeGen/Mips/mips64ext.ll LLVM :: CodeGen/Mips/mips64fpldst.ll LLVM :: CodeGen/Mips/mips64intldst.ll LLVM :: CodeGen/Mips/mips64load-store-left-right.ll LLVM :: CodeGen/Mips/sint-fp-store_pattern.ll Reviewers: dsanders Reviewed By: dsanders CC: matheusalmeida Differential Revision: http://reviews.llvm.org/D3343 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206183 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM64: specify full triple in tests to pacify Windows.Tim Northover2014-04-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206175 91177308-0d34-0410-b5e6-96231b3b80d8
* AArch64: add newline to end of test files.Tim Northover2014-04-14
| | | | | | Should be no other change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206174 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM64: remove buggy REV16 pattern.Tim Northover2014-04-14
| | | | | | The 32-bit pattern is still valid: 0123 -> 3210 -> 1032. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206172 91177308-0d34-0410-b5e6-96231b3b80d8
* AArch64/ARM64: enable directcond.ll test on ARM64.Tim Northover2014-04-14
| | | | | | | Code change is because optimizeCompareInstr didn't know how to pull the condition code out of FCSEL instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206171 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM64: add patterns for csXYZ with reversed operands.Tim Northover2014-04-14
| | | | | | | AArch64 tests for this, and it's obviously a good idea. Have to invert the condition code, of course. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206170 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM64: enable more regression tests from AArch64Tim Northover2014-04-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206169 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM64: add support for AArch64's addsub_ext.llTim Northover2014-04-14
| | | | | | | | | There was one definite issue in ARM64 (the off-by-1 check for whether a shift could be folded in) and one difference that is probably correct: ARM64 didn't fold nodes with multiple uses into the arithmetic operations unless optimising for code size. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206168 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM64: optimise (cmp x, (sub 0, y)) to (cmn x, y).Tim Northover2014-04-14
| | | | | | | This transformation is only valid when being used for an EQ or NE comparison since the flags change otherwise. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206167 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM64: start porting regression test suite from AArch64Tim Northover2014-04-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206166 91177308-0d34-0410-b5e6-96231b3b80d8
* [XCore] Don't create invalid MKMSK instructions inside loadImmediate().Richard Osborne2014-04-14
| | | | | | | | | | | | | | | | | Summary: Previously loadImmediate() would produce MKMSK instructions with invalid immediate values such as mkmsk r0, 9. Fix this by checking the mask size is valid. Reviewers: robertlytton Reviewed By: robertlytton CC: llvm-commits Differential Revision: http://reviews.llvm.org/D3289 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206163 91177308-0d34-0410-b5e6-96231b3b80d8
* Whitespace.NAKAMURA Takumi2014-04-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206154 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r206045, "Fix shift by constants for vector."NAKAMURA Takumi2014-04-14
| | | | | | It broke some builders, at least, i686. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206153 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't assert in BasicTTI::getMemoryOpCost for non-simple typesHal Finkel2014-04-14
| | | | | | | | BasicTTI::getMemoryOpCost must explicitly check for non-simple types; setting AllowUnknown=true with TLI->getSimpleValueType is not sufficient because, for example, non-power-of-two vector types return non-simple EVTs (not MVT::Other). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206150 91177308-0d34-0410-b5e6-96231b3b80d8
* tools: address possible non-null terminated filenamesSaleem Abdulrasool2014-04-14
| | | | | | | | | If a filename is a multiple of 18 characters, there will be no null-terminator. This will result in an invalid access by the constructed StringRef. Add a test case to exercise this and fix that handling. Address this same vulnerability in llvm-readobj as well. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206145 91177308-0d34-0410-b5e6-96231b3b80d8
* [PowerPC] [Constant Hoisting] Enable constant hoisting on PPCHal Finkel2014-04-13
| | | | | | | | | | Implements the various TTI functions to enable constant hoisting on PPC. The only significant test-suite change is this: MultiSource/Benchmarks/VersaBench/bmm/bmm - 20% speedup (which essentially reverses the slowdown from r206120). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206141 91177308-0d34-0410-b5e6-96231b3b80d8
* Recognize test for overflow in integer multiplication.Serge Pavlov2014-04-13
| | | | | | | | | | | | | | | | | | | If multiplication involves zero-extended arguments and the result is compared as in the patterns: %mul32 = trunc i64 %mul64 to i32 %zext = zext i32 %mul32 to i64 %overflow = icmp ne i64 %mul64, %zext or %overflow = icmp ugt i64 %mul64 , 0xffffffff then the multiplication may be replaced by call to umul.with.overflow. This change fixes PR4917 and PR4918. Differential Revision: http://llvm-reviews.chandlerc.com/D2814 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206137 91177308-0d34-0410-b5e6-96231b3b80d8
* [PowerPC] Fix rlwimi isel when mask is not constantHal Finkel2014-04-13
| | | | | | | | | | | | | | | | | We had been using the known-zero values of the operand of the or to construct the mask for an rlwimi; this is not quite correct, but fine when the mask is constant. When the mask is constant, then the known zeros of the operand must be a superset of the zeros in the mask. However, when the mask is not a constant, then there might be bits in the operand that are not known to be zero that, at runtime, might be zero in the mask. Therefore, we check that any bits not known to be zero *are* known to be one in the mask. Otherwise, we can't fold the mask with the or and shift. This was revealed as a miscompile of MultiSource/Benchmarks/BitBench/drop3/drop3 when I started experimenting with constant hoisting. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206136 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix instruction debug info location during legalizationDavid Blaikie2014-04-13
| | | | | | | | | | | | I found this from a particular GDB test suite case of inlining (something similar is provided as a test case) but came across a few other related cases (other callers of the same functions, and one other instance of the same coding mistake in a separate function). I'm not sure what the best way to test this is (let alone to cover the other cases I discovered), so hopefully this sufficies - open to ideas. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206130 91177308-0d34-0410-b5e6-96231b3b80d8
* tools: teach objdump about FILE aux recordsSaleem Abdulrasool2014-04-13
| | | | | | | | | Add support for file auxiliary symbol entries in COFF symbol tables. A COFF symbol table with a FILE entry is followed by sizeof(__FILE__) / 18 auxiliary symbol records which contain the filename. Read them and form the original filename that the record contains. Then display the name in the output. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206126 91177308-0d34-0410-b5e6-96231b3b80d8
* [PowerPC] Implement some additional TLI callbacksHal Finkel2014-04-12
| | | | | | | | | | | | | | | | | | | | | | | | Add implementations of: bool isLegalICmpImmediate(int64_t Imm) const bool isLegalAddImmediate(int64_t Imm) const bool isTruncateFree(Type *Ty1, Type *Ty2) const bool isTruncateFree(EVT VT1, EVT VT2) const bool shouldConvertConstantLoadToIntImm(const APInt &Imm, Type *Ty) const Unfortunately, this regresses counter-register-based loop formation because some of the loops now end up in forms were SE cannot compute loop counts. However, nevertheless, the test-suite results favor committing: SingleSource/Benchmarks/BenchmarkGame/puzzle: 26% speedup MultiSource/Benchmarks/FreeBench/analyzer/analyzer: 21% speedup MultiSource/Benchmarks/MiBench/automotive-susan/automotive-susan: 20% speedup SingleSource/Benchmarks/Polybench/linear-algebra/kernels/trisolv/trisolv: 19% speedup SingleSource/Benchmarks/Polybench/linear-algebra/kernels/gesummv/gesummv: 15% speedup MultiSource/Benchmarks/FreeBench/pcompress2/pcompress2: 2% speedup MultiSource/Benchmarks/VersaBench/bmm/bmm: 26% slowdown git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206120 91177308-0d34-0410-b5e6-96231b3b80d8
* PR13337: Omit DW_TAG_restrict_type when compiling for DWARF2David Blaikie2014-04-12
| | | | | | | DWARF3 introduced DW_TAG_restrict_type, so avoid using it in prior versions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206105 91177308-0d34-0410-b5e6-96231b3b80d8
* Add extra checks to mvn.ll test to prevent the "f1" check from matchingRichard Trieu2014-04-12
| | | | | | | on a directory name instead of the function name. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206104 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "Debug info: (bugfix) C++ C/Dtors can be compiled to multiple functions,"Adrian Prantl2014-04-12
| | | | | | | This reverts commit 206096 while I investigate why this broke the gdb buildbot. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206103 91177308-0d34-0410-b5e6-96231b3b80d8
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