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* Add TargetLowering::prepareVolatileOrAtomicLoadRichard Sandiford2013-12-10
| | | | | | | | | | | | | | | | | | One unusual feature of the z architecture is that the result of a previous load can be reused indefinitely for subsequent loads, even if a cache-coherent store to that location is performed by another CPU. A special serializing instruction must be used if you want to force a load to be reattempted. Since volatile loads are not supposed to be omitted in this way, we should insert a serializing instruction before each such load. The same goes for atomic loads. The patch implements this at the IR->DAG boundary, in a similar way to atomic fences. It is a no-op for targets other than SystemZ. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196906 91177308-0d34-0410-b5e6-96231b3b80d8
* Add TargetLowering::prepareVolatileOrAtomicLoadRichard Sandiford2013-12-10
| | | | | | | | | | | | | | | | | | One unusual feature of the z architecture is that the result of a previous load can be reused indefinitely for subsequent loads, even if a cache-coherent store to that location is performed by another CPU. A special serializing instruction must be used if you want to force a load to be reattempted. Since volatile loads are not supposed to be omitted in this way, we should insert a serializing instruction before each such load. The same goes for atomic loads. The patch implements this at the IR->DAG boundary, in a similar way to atomic fences. It is a no-op for targets other than SystemZ. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196905 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64 NEON] Support poly128_t and implement relevant intrinsic.Kevin Qin2013-12-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196887 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "Fix miscompile of MS inline assembly with stack realignment"Reid Kleckner2013-12-10
| | | | | | | This reverts commit r196876. Its tests failed on the bots, so I'll figure it out tomorrow. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196879 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix miscompile of MS inline assembly with stack realignmentReid Kleckner2013-12-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | For stack frames requiring realignment, three pointers may be needed: - ebp to address incoming arguments - esi (could be any callee-saved register) to address locals - esp to address outgoing arguments We would use esi unconditionally without verifying that it did not conflict with inline assembly. This change doesn't do the verification, it simply emits a fatal error on functions that use stack realignment, dynamic SP adjustments, and inline assembly. Because stack realignment is common on Windows, we also no longer assume that MS inline assembly clobbers esp. Instead, we analyze the inline instructions for implicit definitions and check if esp is there. If so, we require the use of a base pointer and consider it in the condition above. Mostly fixes PR16830, but we could try harder to find a non-conflicting base pointer. Reviewers: sunfish Differential Revision: http://llvm-reviews.chandlerc.com/D1317 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196876 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PR18162 - Incorrect assertion assumed that the SDValue resno is zero.Nadav Rotem2013-12-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196858 91177308-0d34-0410-b5e6-96231b3b80d8
* Update testcase for previous commit.Eric Christopher2013-12-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196857 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-cov: Added -a option for block data.Yuchen Wu2013-12-10
| | | | | | | | | | | | | | | Similar to gcov, llvm-cov will now print out the block count at the end of each block. Multiple blocks can end on the same line. One computational difference is by using -a, llvm-cov will no longer simply add the block counts together to form a line count. Instead, it will take the maximum of the block counts on that line. This has a similar effect to what gcov does, but generates more correct counts in certain scenarios. Also updated tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196856 91177308-0d34-0410-b5e6-96231b3b80d8
* Transforms: Don't create bad branch weights when folding a switchJustin Bogner2013-12-10
| | | | | | | | This avoids creating branch weight metadata of length one when we fold cases into the default of a switch instruction, which was triggering an assert. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196845 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Refactor the NEON scalar reduce pairwise intrinsics, so that they useChad Rosier2013-12-09
| | | | | | float/double rather than the vector equivalents when appropriate. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196833 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Refactor NEON scalar reduce pairwise front-end codegen to removeChad Rosier2013-12-09
| | | | | | unnecessary patterns in tablegen. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196832 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Remove q and non-q intrinsic definitions in the NEON scalar reduceChad Rosier2013-12-09
| | | | | | pairwise implementation, using an overloaded definition instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196831 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't add suffixes for stdcall/fastcall on 64 coff.Rafael Espindola2013-12-09
| | | | | | This matches the behavior of both msvc and mingw. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196814 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix pattern match for movi with 0D resultAna Pazos2013-12-09
| | | | | | | | | | | | | Patch by Jiangning Liu. With some test case changes: - intrinsic test added to the existing /test/CodeGen/AArch64/neon-aba-abd.ll. - New test cases to cover movi 1D scenario without using the intrinsic in test/CodeGen/AArch64/neon-mov.ll. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196806 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips][msa] Fix invalid generated code when lowering FrameIndex involving ↵Daniel Sanders2013-12-09
| | | | | | | | | | | | | | | | | | | | | | | | unaligned offsets. Summary: The MSA ld.[bhwd] and st.[bhwd] instructions scale the immediate by the element size before use as an offset. The offset must therefore be a multiple of the element size to be valid in these instructions. However, an unaligned base address is valid in MSA. This commit causes the compiler to emit valid code when the calculated offset is not a multiple of the element size by accounting for the offset using addiu and using a zero offset in the load/store. Depends on D2338 Reviewers: matheusalmeida Reviewed By: matheusalmeida Differential Revision: http://llvm-reviews.chandlerc.com/D2339 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196777 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips][msa] Fix suboptimal FrameIndex lowering for ld.[hwd] and st.[hwd]Daniel Sanders2013-12-09
| | | | | | | | | | | | | | Summary: The immediate in these instructions is scaled before use as an offset. They therefore have a wider reach than ld.b/st.b. Reviewers: matheusalmeida Reviewed By: matheusalmeida Differential Revision: http://llvm-reviews.chandlerc.com/D2338 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196775 91177308-0d34-0410-b5e6-96231b3b80d8
* Method parseSetAssignment treats every operand with '$' sign as register and ↵Vladimir Medic2013-12-09
| | | | | | | | | the parsing is directed to set alias for register. This will result in errors reported when expressions containing label references are parsed(for example long jumps) As we can't make a complete solution now it has been decided to enable .set directive to handle long jump expressions. This will cause parser to report errors when parsing integer based register assignments, for example: .set r3, will be reported as error. Still, the need for expressions is higher priority as the integer based register assignments are Mips specific and can be avoided using register names. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196773 91177308-0d34-0410-b5e6-96231b3b80d8
* [SPARCV9]: Adjust the resultant pointer of DYNAMIC_STACKALLOC with the stack ↵Venkatraman Govindaraju2013-12-09
| | | | | | BIAS on sparcV9. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196755 91177308-0d34-0410-b5e6-96231b3b80d8
* [Sparc]: Implement getSetCCResultType() in SparcTargetLowering so that ↵Venkatraman Govindaraju2013-12-09
| | | | | | umulo/smulo can be lowered on sparcv9 without an assertion error. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196751 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64]Add missing pair intrinsics such as:Hao Liu2013-12-09
| | | | | | | | int32_t vminv_s32(int32x2_t a) which should be compiled into SMINP Vd.2S,Vn.2S,Vm.2S git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196749 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64]Pattern match failures for truncate store and extend loadHao Liu2013-12-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196748 91177308-0d34-0410-b5e6-96231b3b80d8
* [SparcV9]: Expand MULHU/MULHS:i64 and UMUL_LOHI/SMUL_LOHI:i64 on sparcv9.Venkatraman Govindaraju2013-12-08
| | | | | | | This fixes PR18150. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196735 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert 196544 due to internal bot failures.Manman Ren2013-12-08
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196732 91177308-0d34-0410-b5e6-96231b3b80d8
* Cleaning up of prologue/epilogue code for Mips16. First stepReed Kotler2013-12-08
| | | | | | | | here is to make save/restore into variable number of argument instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196726 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: fix folding of stack-adjustment (yet again).Tim Northover2013-12-08
| | | | | | | | | | | | | | | | | | | | | | When trying to eliminate an "sub sp, sp, #N" instruction by folding it into an existing push/pop using dummy registers, we need to account for the fact that this might affect precisely how "fp" gets set in the prologue. We were attempting this, but assuming that *whenever* we performed a fold it would make a difference. This is false, for example, in: push {r4, r7, lr} add fp, sp, #4 vpush {d8} sub sp, sp, #8 we can fold the "sub" into the "vpush", forming "vpush {d7, d8}". However, in that case the "add fp" instruction mustn't change, which we were getting wrong before. Should fix PR18160. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196725 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixed CRLFMichael Kuperstein2013-12-08
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196719 91177308-0d34-0410-b5e6-96231b3b80d8
* Ensure bitcode encoding of visibility styles stays stable. Patch by Boaz Ouriel.Michael Kuperstein2013-12-08
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196718 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix inlining to not lose the "cleanup" clause from landingpadsMark Seaborn2013-12-08
| | | | | | | This fixes PR17872. This bug can lead to C++ destructors not being called when they should be, when an exception is thrown. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196711 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix inlining to not produce duplicate landingpad clausesMark Seaborn2013-12-08
| | | | | | | | | | | | | | | | | | | | | | | Before this change, inlining one "invoke" into an outer "invoke" call site can lead to the outer landingpad's catch/filter clauses being copied multiple times into the resulting landingpad. This happens: * when the inlined function contains multiple "resume" instructions, because forwardResume() copies the clauses but is called multiple times; * when the inlined function contains a "resume" and a "call", because HandleCallsInBlockInlinedThroughInvoke() copies the clauses but is redundant with forwardResume(). Fix this by deduplicating the code. This problem doesn't lead to any incorrect execution; it's only untidy. This change will make fixing PR17872 a little easier. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196710 91177308-0d34-0410-b5e6-96231b3b80d8
* force vector width via cpu on vectorizer metadata enableRenato Golin2013-12-07
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196669 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove empty MCJIT/load-object-a.ll since r196641.NAKAMURA Takumi2013-12-07
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196645 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r196639 while I investigate a bot failure.Lang Hames2013-12-07
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196641 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for archives and object file caching under MCJIT.Lang Hames2013-12-07
| | | | | | | | Patch by Andy Kaylor, with minor edits to resolve merge conflicts. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196639 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix assert with copy from global through addrspacecastMatt Arsenault2013-12-07
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196638 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Fix test case.Akira Hatanaka2013-12-07
| | | | | | | | | Indent the command lines to indicate they continue from previous lines. Also, fix incorrect uses of CHECK-DAG and CHECK-NOT. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196636 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a RequireStructuredCFG Field to TargetMachine.Vincent Lejeune2013-12-07
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196634 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-cov: Added test.h header to tests.Yuchen Wu2013-12-07
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196632 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the segfault reported in PR 11990.Kaelyn Uhrain2013-12-07
| | | | | | | | The sefault occurs due to an infinite loop when the verifier tries to determine the size of a type of the form "%rt = type { %rt }" while checking an alloca of the type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196626 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't use isNullValue to evaluate ConstantExprDuncan P. N. Exon Smith2013-12-06
| | | | | | | | ConstantExpr can evaluate to false even when isNullValue gives false. Fixes PR18143. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196611 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-cov: Regenerated gcov files with r195513 changes.Yuchen Wu2013-12-06
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196609 91177308-0d34-0410-b5e6-96231b3b80d8
* Integrated assembler incorrectly lexes ARM-style commentsDavid Peixotto2013-12-06
| | | | | | | | | | | | | | | | | | | | | | | | | The integrated assembler fails to properly lex arm comments when they are adjacent to an identifier in the input stream. The reason is that the arm comment symbol '@' is also used as symbol variant in other assembly languages so when lexing an identifier it allows the '@' symbol as part of the identifier. Example: $ cat comment.s foo: add r0, r0@got to parse this as a comment $ llvm-mc -triple armv7 comment.s comment.s:4:18: error: unexpected token in argument list add r0, r0@got to parse this as a comment ^ This should be parsed as correctly as `add r0, r0`. This commit modifes the assembly lexer to not include the '@' symbol in identifiers when lexing for targets that use '@' for comments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196607 91177308-0d34-0410-b5e6-96231b3b80d8
* DebugInfo: Ensure unit IDs (for non-skeletal units) match thein index in the ↵David Blaikie2013-12-06
| | | | | | | | | | | | | | | | | | | list This simplifies reasoning about the code and enables simple navigation from a skeleton to its full unit. (currently there are no type unit skeletons, so the skeleton list doesn't have the same ID == index property) Eventually we should get rid of this ID and just store the labels we need as the IDs are allowing this code to create difficult to manage/understand associations (loops over non-skeletal units are implicitly referencing their skeletal units during pub* emission, for example). It may be necessary to have some kind of skeleton->full unit association and a more direct pointer or similar device would be preferable than an index. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196600 91177308-0d34-0410-b5e6-96231b3b80d8
* Bug 18149: [AArch32] VSel instructions has no ARMCC fieldWeiming Zhao2013-12-06
| | | | | | | | | | The current peephole optimizing for compare inst assumes an instr that uses CPSR has an MO for ARM Cond code.However, for VSEL instructions (vseqeq, vselgt, vselgt, vselvs), there is no such operand nor do they support the modification of Cond Code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196588 91177308-0d34-0410-b5e6-96231b3b80d8
* Update AVX512 vector blend intrinsic names.Cameron McInally2013-12-06
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196581 91177308-0d34-0410-b5e6-96231b3b80d8
* [SystemZ] Use LOAD AND TEST for comparisons with -0Richard Sandiford2013-12-06
| | | | | | | ...since it os equivalent to comparison with +0. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196580 91177308-0d34-0410-b5e6-96231b3b80d8
* [SystemZ] Extend the use of C(L)GFRRichard Sandiford2013-12-06
| | | | | | | | instcombine prefers to put extended operands first, so this patch handles that case for C(L)GFR. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196579 91177308-0d34-0410-b5e6-96231b3b80d8
* [SystemZ] Optimize selects between 0 and -1Richard Sandiford2013-12-06
| | | | | | | | | | | | | | Since z has no setcc instruction as such, the choice of setBooleanContents is a bit arbitrary. Currently it's set to ZeroOrOneBooleanContent, so we produced a branch-free form when selecting between 0 and 1, but not when selecting between 0 and -1. This patch handles the latter case too. At some point I'd like to measure whether it's better to use conditional moves for constant selects on z196, but that's future work. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196578 91177308-0d34-0410-b5e6-96231b3b80d8
* [asan] rewrite asan's stack frame layoutKostya Serebryany2013-12-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Rewrite asan's stack frame layout. First, most of the stack layout logic is moved into a separte file to make it more testable and (potentially) useful for other projects. Second, make the frames more compact by using adaptive redzones (smaller for small objects, larger for large objects). Third, try to minimized gaps due to large alignments (this is hypothetical since today we don't see many stack vars aligned by more than 32). The frames indeed become more compact, but I'll still need to run more benchmarks before committing, but I am sking for review now to get early feedback. This change will be accompanied by a trivial change in compiler-rt tests to match the new frame sizes. Reviewers: samsonov, dvyukov Reviewed By: samsonov CC: llvm-commits Differential Revision: http://llvm-reviews.chandlerc.com/D2324 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196568 91177308-0d34-0410-b5e6-96231b3b80d8
* [Stackmap] Update stackmap unit test to use AnyRegCC.Juergen Ributzka2013-12-06
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196552 91177308-0d34-0410-b5e6-96231b3b80d8
* Apply transformation on OS X 10.9+ and iOS 7.0+: pow(10, x) ―> __exp10(x)Yi Jiang2013-12-05
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196544 91177308-0d34-0410-b5e6-96231b3b80d8
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