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* ARM two-operand aliases for VADD instructions.Jim Grosbach2011-12-07
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146091 91177308-0d34-0410-b5e6-96231b3b80d8
* 64-bit WrapperPICPat patterns.Akira Hatanaka2011-12-07
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146086 91177308-0d34-0410-b5e6-96231b3b80d8
* Modify LowerFCOPYSIGN to handle Mips64.Akira Hatanaka2011-12-07
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146080 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix 64-bit immediate patterns.Akira Hatanaka2011-12-07
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146059 91177308-0d34-0410-b5e6-96231b3b80d8
* Darwin assembler improved relocs when w/o subsections_via_symbols.Jim Grosbach2011-12-07
| | | | | | | | | | When the file isn't being built with subsections-via-symbols, symbol differences involving non-local symbols can be resolved more aggressively. Needed for gas compatibility. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146054 91177308-0d34-0410-b5e6-96231b3b80d8
* Thumb2 alias for long-form pop and friends.Jim Grosbach2011-12-07
| | | | | | rdar://10542474 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146046 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM support the .arm and .thumb directives for assembly mode switching.Jim Grosbach2011-12-07
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146042 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM NEON VCLT(register) is a pseudo aliasing VCGT(register).Jim Grosbach2011-12-07
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146039 91177308-0d34-0410-b5e6-96231b3b80d8
* Tidy up. Move MachO tests to MachO directory.Jim Grosbach2011-12-07
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146038 91177308-0d34-0410-b5e6-96231b3b80d8
* Support vector bitcasts in the AsmPrinter. PR11495.Eli Friedman2011-12-07
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146001 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix an optimization involving EXTRACT_SUBVECTOR in DAGCombine so it behaves ↵Eli Friedman2011-12-07
| | | | | | correctly. PR11494. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145996 91177308-0d34-0410-b5e6-96231b3b80d8
* delaying restore-cr changed assigned registers in some testsHal Finkel2011-12-06
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145963 91177308-0d34-0410-b5e6-96231b3b80d8
* add a test case that uses RESTORE_CRHal Finkel2011-12-06
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145962 91177308-0d34-0410-b5e6-96231b3b80d8
* PTX: Continue to fix up the register mess.Justin Holewinski2011-12-06
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145947 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a bunch of SSE/AVX patterns to use v2i64/v4i64 loads since all other ↵Craig Topper2011-12-06
| | | | | | integer vector loads are promoted to those. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145927 91177308-0d34-0410-b5e6-96231b3b80d8
* test/MC: Introduce MC/MachO/ARM, and relocate relax-thumb2-branches.s into it.NAKAMURA Takumi2011-12-06
| | | | | | FIXME: Restore more other arch-dependent MachO tests. (eg. r126401 and r133856) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145925 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM mode 'mul' operand ordering tweak.Jim Grosbach2011-12-06
| | | | | | Same as r145922, just for ARM mode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145923 91177308-0d34-0410-b5e6-96231b3b80d8
* Thumb2: MUL two-operand form encoding operand order fix.Jim Grosbach2011-12-06
| | | | | | | | | Fix the alias to encode 'mul r5, r6' as if it were 'mul r5, r6, r5' so we match gas. rdar://10532439 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145922 91177308-0d34-0410-b5e6-96231b3b80d8
* Merge isSHUFPMask and isCommutedSHUFPMask into single function that can do ↵Craig Topper2011-12-06
| | | | | | both. Do the same for the 256-bit version. Use loops to reduce size of isVSHUFPYMask. Fix test cases that were incorrectly passing due to isCommutedSHUFPMask not checking for the vector being 128-bit. This caused some 256-bit shuffles to be incorrectly commuted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145921 91177308-0d34-0410-b5e6-96231b3b80d8
* Thumb2 encoding choice correction for PLD.Jim Grosbach2011-12-06
| | | | | | | | Using encoding T1 for offset of #0 and encoding T2 for #-0. rdar://10532413 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145919 91177308-0d34-0410-b5e6-96231b3b80d8
* test/MC: Move relax-thumb2-branches.s from MC/MachO/ to MC/ARM.NAKAMURA Takumi2011-12-06
| | | | | | MC/MachO assumes x86. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145916 91177308-0d34-0410-b5e6-96231b3b80d8
* LSR: prune undesirable formulae early.Andrew Trick2011-12-06
| | | | | | | | | | It's always good to prune early, but formulae that are unsatisfactory in their own right need to be removed before running any other pruning heuristics. We easily avoid generating such formulae, but we need them as an intermediate basis for forming other good formulae. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145906 91177308-0d34-0410-b5e6-96231b3b80d8
* [arm-fast-isel] Doublewords only require word-alignment.Chad Rosier2011-12-06
| | | | | | rdar://10528060 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145891 91177308-0d34-0410-b5e6-96231b3b80d8
* Align ARM constant pool islands via their basic block.Jakob Stoklund Olesen2011-12-06
| | | | | | | | | | | Previously, all ARM::CONSTPOOL_ENTRY instructions had a hardwired alignment of 4 bytes emitted by ARMAsmPrinter. Now the same alignment is set on the basic block. This is in preparation of supporting ARM constant pool islands with different alignments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145890 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix ARM handling of tBcc branch relaxation.Jim Grosbach2011-12-06
| | | | | | rdar://10069056 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145885 91177308-0d34-0410-b5e6-96231b3b80d8
* Probably not a good idea to convert a single vector load into a memcpy. WeChad Rosier2011-12-06
| | | | | | | | don't do this now, but add a test case to prevent this from happening in the future. Additional test for rdar://9892684 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145879 91177308-0d34-0410-b5e6-96231b3b80d8
* Make the MemCpyOptimizer a bit more aggressive. I can't think of a scenerioChad Rosier2011-12-05
| | | | | | | | where this would be bad as the backend shouldn't have a problem inlining small memcpys. rdar://10510150 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145865 91177308-0d34-0410-b5e6-96231b3b80d8
* Tweak ADDrr fix. Bad check for explicit .wJim Grosbach2011-12-05
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145863 91177308-0d34-0410-b5e6-96231b3b80d8
* Update tests for r145860. Add a few new ones.Jim Grosbach2011-12-05
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145861 91177308-0d34-0410-b5e6-96231b3b80d8
* Add definitions of 64-bit extract and insert instrucions and makeAkira Hatanaka2011-12-05
| | | | | | | | | PerformANDCombine and PerformOrCombine aware of them. Test cases are included too. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145853 91177308-0d34-0410-b5e6-96231b3b80d8
* Thumb2 prefer encoding T3 to T4 for ADD/SUB immediate instructions.Jim Grosbach2011-12-05
| | | | | | | rdar://10529348 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145851 91177308-0d34-0410-b5e6-96231b3b80d8
* Have LowerJumpTable support Mips64. Modify 2010-07-20-Switch.ll to test N64 andAkira Hatanaka2011-12-05
| | | | | | | O32 with relocation-model=pic too. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145850 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM assembly parsing for the rest of the VMUL data type aliases.Jim Grosbach2011-12-05
| | | | | | | Finish up rdar://10522016. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145846 91177308-0d34-0410-b5e6-96231b3b80d8
* Add test case - this input used to crash because of duplicate generation of ↵Hal Finkel2011-12-05
| | | | | | SPILL_CRs git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145820 91177308-0d34-0410-b5e6-96231b3b80d8
* enable PPC register scavenging by default (update tests and remove some FIXMEs)Hal Finkel2011-12-05
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145819 91177308-0d34-0410-b5e6-96231b3b80d8
* remove wasted space for extra bit copies of CR2 subregsHal Finkel2011-12-05
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145817 91177308-0d34-0410-b5e6-96231b3b80d8
* test/CodeGen/X86/pointer-vector.ll: Add explicit -mtriple=i686-linux.NAKAMURA Takumi2011-12-05
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145805 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for vectors of pointers.Nadav Rotem2011-12-05
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145801 91177308-0d34-0410-b5e6-96231b3b80d8
* Emit the ctors in the proper order on ARM/EABI.Anton Korobeynikov2011-12-03
| | | | | | | | | Maybe some targets should use this as well. Patch by Evgeniy Stepanov! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145781 91177308-0d34-0410-b5e6-96231b3b80d8
* Sparc CodeGen: Fix AnalyzeBranch for PR 10282. Removing addSuccessor() sinceVenkatraman Govindaraju2011-12-03
| | | | | | | AnalyzeBranch doesn't change the successor, just the order. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145779 91177308-0d34-0410-b5e6-96231b3b80d8
* Check for stack space more intelligently.Sanjoy Das2011-12-03
| | | | | | | | | | libgcc sets the stack limit field in TCB to 256 bytes above the actual allocated stack limit. This means if the function's stack frame needs less than 256 bytes, we can just compare the stack pointer with the stack limit. This should result in lesser calls to __morestack. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145766 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a bug in the x86-32 code generated for segmented stacks.Sanjoy Das2011-12-03
| | | | | | | | | | | Currently LLVM pads the call to __morestack with a add and sub of 8 bytes to esp. This isn't correct since __morestack expects the call to be followed directly by a ret. This commit also adjusts the relevant test-case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145765 91177308-0d34-0410-b5e6-96231b3b80d8
* [arm-fast-isel] Unaligned stores of floats require special care.Chad Rosier2011-12-03
| | | | | | rdar://10510150 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145742 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixed deadstoreelimination bug where negative indices were incorrectly ↵Pete Cooper2011-12-03
| | | | | | | | | | causing the optimisation to occur Turns out long long + unsigned long long is unsigned. Doh! Fixes http://llvm.org/bugs/show_bug.cgi?id=11455 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145731 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for constant folding the pow intrinsic.Chad Rosier2011-12-03
| | | | | | rdar://10514247 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145730 91177308-0d34-0410-b5e6-96231b3b80d8
* Test cases for 64-bit multiplication and division.Akira Hatanaka2011-12-02
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145717 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix test cases to use FileCheck.Akira Hatanaka2011-12-02
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145716 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM tests for VLD1 single lane w/ writeback.Jim Grosbach2011-12-02
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145713 91177308-0d34-0410-b5e6-96231b3b80d8
* [arm-fast-isel] After promoting a function parameter be sure to update theChad Rosier2011-12-02
| | | | | | | | argument value type. Otherwise, the sign/zero-extend has no effect on arguments passed via the stack (i.e., undefined high-order bits). rdar://10515467 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145701 91177308-0d34-0410-b5e6-96231b3b80d8
* specify cpu for test to fix failure on some darwin systems with a g4+ cpuHal Finkel2011-12-02
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145699 91177308-0d34-0410-b5e6-96231b3b80d8
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