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* MemCpyOpt: When merging memsets also merge the trivial case of two memsets ↵Benjamin Kramer2014-03-10
| | | | | | | | with the same destination. The testcase is from PR19092, but I think the bug described there is actually a clang issue. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203489 91177308-0d34-0410-b5e6-96231b3b80d8
* For functions with ARM target specific calling convention, when simplify-libcallEvan Cheng2014-03-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | optimize a call to a llvm intrinsic to something that invovles a call to a C library call, make sure it sets the right calling convention on the call. e.g. extern double pow(double, double); double t(double x) { return pow(10, x); } Compiles to something like this for AAPCS-VFP: define arm_aapcs_vfpcc double @t(double %x) #0 { entry: %0 = call double @llvm.pow.f64(double 1.000000e+01, double %x) ret double %0 } declare double @llvm.pow.f64(double, double) #1 Simplify libcall (part of instcombine) will turn the above into: define arm_aapcs_vfpcc double @t(double %x) #0 { entry: %__exp10 = call double @__exp10(double %x) #1 ret double %__exp10 } declare double @__exp10(double) The pre-instcombine code works because calls to LLVM builtins are special. Instruction selection will chose the right calling convention for the call. However, the code after instcombine is wrong. The call to __exp10 will use the C calling convention. I can think of 3 options to fix this. 1. Make "C" calling convention just work since the target should know what CC is being used. This doesn't work because each function can use different CC with the "pcs" attribute. 2. Have Clang add the right CC keyword on the calls to LLVM builtin. This will work but it doesn't match the LLVM IR specification which states these are "Standard C Library Intrinsics". 3. Fix simplify libcall so the resulting calls to the C routines will have the proper CC keyword. e.g. %__exp10 = call arm_aapcs_vfpcc double @__exp10(double %x) #1 This works and is the solution I implemented here. Both solutions #2 and #3 would work. After carefully considering the pros and cons, I decided to implement #3 for the following reasons. 1. It doesn't change the "spec" of the intrinsics. 2. It's a self-contained fix. There are a couple of potential downsides. 1. There could be other places in the optimizer that is broken in the same way that's not addressed by this. 2. There could be other calling conventions that need to be propagated by simplify-libcall that's not handled. But for now, this is the fix that I'm most comfortable with. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203488 91177308-0d34-0410-b5e6-96231b3b80d8
* Followup to r203483 - add test.Eli Bendersky2014-03-10
| | | | | | | [forgot to 'svn add' before committing r203483] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203485 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Implement NaCl sandboxing of loads, stores and SP changes:Sasa Stankovic2014-03-10
| | | | | | | | | | | * Add masking instructions before loads and stores (in MC layer). * Add masking instructions after SP changes (in MC layer). * Forbid loads, stores and SP changes in delay slots (in MI layer). Differential Revision: http://llvm-reviews.chandlerc.com/D2904 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203484 91177308-0d34-0410-b5e6-96231b3b80d8
* [bugpoint] Add testcase for r203343.Adam Nemet2014-03-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203472 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix regression with -O0 for mips .Reed Kotler2014-03-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203469 91177308-0d34-0410-b5e6-96231b3b80d8
* Add test for LinkModules warning on triple, modified by r203009. Datalayout ↵JF Bastien2014-03-10
| | | | | | is already tested. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203468 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Assembly parser must invoke the target streamer to handle .set ↵Matheus Almeida2014-03-10
| | | | | | reorder macro. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203459 91177308-0d34-0410-b5e6-96231b3b80d8
* AArch64: fix LowerCONCAT_VECTORS for new CodeGen.Tim Northover2014-03-10
| | | | | | | | | | | | | | | The function was making too many assumptions about its input: 1. The NEON_VDUP optimisation was far too aggressive, assuming (I think) that the input would always be BUILD_VECTOR. 2. We were treating most unknown concats as legal (by returning Op rather than SDValue()). I think only concats of pairs of vectors are actually legal. http://llvm.org/PR19094 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203450 91177308-0d34-0410-b5e6-96231b3b80d8
* [Sparc] Add support for decoding 'swap' instruction.Venkatraman Govindaraju2014-03-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203424 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r203230, "CodeGenPrep: sink extends of illegal types into use block."NAKAMURA Takumi2014-03-09
| | | | | | It choked i686 stage2. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203386 91177308-0d34-0410-b5e6-96231b3b80d8
* IR: Change inalloca's grammar a bitDavid Majnemer2014-03-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The grammar for LLVM IR is not well specified in any document but seems to obey the following rules: - Attributes which have parenthesized arguments are never preceded by commas. This form of attribute is the only one which ever has optional arguments. However, not all of these attributes support optional arguments: 'thread_local' supports an optional argument but 'addrspace' does not. Interestingly, 'addrspace' is documented as being a "qualifier". What constitutes a qualifier? I cannot find a definition. - Some attributes use a space between the keyword and the value. Examples of this form are 'align' and 'section'. These are always preceded by a comma. - Otherwise, the attribute has no argument. These attributes do not have a preceding comma. Sometimes an attribute goes before the instruction, between the instruction and it's type, or after it's type. 'atomicrmw' has 'volatile' between the instruction and the type while 'call' has 'tail' preceding the instruction. With all this in mind, it seems most consistent for 'inalloca' on an 'inalloca' instruction to occur before between the instruction and the type. Unlike the current formulation, there would be no preceding comma. The combination 'alloca inalloca' doesn't look particularly appetizing, perhaps a better spelling of 'inalloca' is down the road. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203376 91177308-0d34-0410-b5e6-96231b3b80d8
* Update comment from r203315 based on reviewAdam Nemet2014-03-08
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203361 91177308-0d34-0410-b5e6-96231b3b80d8
* DebugInfo: further improvements to test following up on r203329David Blaikie2014-03-08
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203337 91177308-0d34-0410-b5e6-96231b3b80d8
* DebugInfo: Fix test fallout from r203323David Blaikie2014-03-08
| | | | | | Will fix this harder in a moment. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203329 91177308-0d34-0410-b5e6-96231b3b80d8
* DebugInfo: Use DW_FORM_data4 for DW_AT_high_pc in DW_TAG_lexical_blocksDavid Blaikie2014-03-08
| | | | | | Suggested by Adrian Prantl in code review for r203187 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203323 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for hashing location information for CU level hashes.Eric Christopher2014-03-08
| | | | | | | Add a testcase based on sret.cpp where we can now hash the entire compile unit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203319 91177308-0d34-0410-b5e6-96231b3b80d8
* [DAGCombiner] Recognize another rotation idiomAdam Nemet2014-03-07
| | | | | | | | | | | | | | | | This is the new idiom: x<<(y&31) | x>>((0-y)&31) which is recognized as: x ROTL (y&31) The change refines matchRotateSub. In Neg & (OpSize - 1) == (OpSize - Pos) & (OpSize - 1), if Pos is Pos' & (OpSize - 1) we can just use Pos' instead of Pos. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203315 91177308-0d34-0410-b5e6-96231b3b80d8
* ISel: Make VSELECT selection terminate in cases where the condition type has toArnold Schwaighofer2014-03-07
| | | | | | | | | | | | | | | be split and the result type widened. When the condition of a vselect has to be split it makes no sense widening the vselect and thereby widening the condition. We end up in an endless loop of widening (vselect result type) and splitting (condition mask type) doing this. Instead, split both the condition and the vselect and widen the result. I ran this over the test suite with i686 and mattr=+sse and saw no regressions. Fixes PR18036. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203311 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unnecessary test for Darwin and update testcase to be a little lessAdrian Prantl2014-03-07
| | | | | | | horrible/fragile. rdar://problem/16264854 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203309 91177308-0d34-0410-b5e6-96231b3b80d8
* Moved test file from test/MC/Mips to test/CodeGen/Mips.Sasa Stankovic2014-03-07
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203298 91177308-0d34-0410-b5e6-96231b3b80d8
* DebugInfo: Use DW_FORM_data4 for DW_AT_high_pc in inlined functionsDavid Blaikie2014-03-07
| | | | | | Suggested by Adrian Prantl in code review for r203187. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203296 91177308-0d34-0410-b5e6-96231b3b80d8
* DebugInfo: Update test to cover linux (with a FIXME...) tooDavid Blaikie2014-03-07
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203295 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: Using SGPRs is illegal for instructions that read carry-out from VCCTom Stellard2014-03-07
| | | | | | Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203281 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: Custom lower i1 storesTom Stellard2014-03-07
| | | | | | | | | These are sometimes created by the shrink to boolean optimization in the globalopt pass. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203280 91177308-0d34-0410-b5e6-96231b3b80d8
* DebugInfo: Restrict DW_AT_high_pc encoding as data4 offset to DWARF 4 as per ↵David Blaikie2014-03-07
| | | | | | | | spec Code review feedback to r203187 from Oliver Stannard. Thanks! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203256 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: Make .unreq directives case-insensitiveDuncan P. N. Exon Smith2014-03-07
| | | | | | | | Be case-insensitive when processing .unreq directives. Patch by Lin Zuojian! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203251 91177308-0d34-0410-b5e6-96231b3b80d8
* CodeGenPrep: sink extends of illegal types into use block.Tim Northover2014-03-07
| | | | | | | | | This helps the instruction selector to lower an i64 * i64 -> i128 multiplication into a single instruction on targets which support it. Patch by Manuel Jacob. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203230 91177308-0d34-0410-b5e6-96231b3b80d8
* InstCombine: form shuffles from wider range of insert/extractelementsTim Northover2014-03-07
| | | | | | | | | | | | Sequences of insertelement/extractelements are sometimes used to build vectorsr; this code tries to put them back together into shuffles, but could only produce a completely uniform shuffle types (<N x T> from two <N x T> sources). This should allow shuffles with different numbers of elements on the input and output sides as well. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203229 91177308-0d34-0410-b5e6-96231b3b80d8
* Replace PROLOG_LABEL with a new CFI_INSTRUCTION.Rafael Espindola2014-03-07
| | | | | | | | | | | | | | | | | | | | | | | The old system was fairly convoluted: * A temporary label was created. * A single PROLOG_LABEL was created with it. * A few MCCFIInstructions were created with the same label. The semantics were that the cfi instructions were mapped to the PROLOG_LABEL via the temporary label. The output position was that of the PROLOG_LABEL. The temporary label itself was used only for doing the mapping. The new CFI_INSTRUCTION has a 1:1 mapping to MCCFIInstructions and points to one by holding an index into the CFI instructions of this function. I did consider removing MMI.getFrameInstructions completelly and having CFI_INSTRUCTION own a MCCFIInstruction, but MCCFIInstructions have non trivial constructors and destructors and are somewhat big, so the this setup is probably better. The net result is that we don't create temporary labels that are never used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203204 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow constant folding of round function whenever feasibleKarthik Bhat2014-03-07
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203198 91177308-0d34-0410-b5e6-96231b3b80d8
* DebugInfo: Limit r203187 to non-darwin as lldb can't handle this yetDavid Blaikie2014-03-07
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203192 91177308-0d34-0410-b5e6-96231b3b80d8
* DebugInfo: Emit DW_TAG_subprogram's DW_AT_high_pc as an offset from the low_pcDavid Blaikie2014-03-07
| | | | | | | This removes a relocation from each subprogram, reducing link times, etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203187 91177308-0d34-0410-b5e6-96231b3b80d8
* DebugInfo: Refactor test to not rely on fixed DIE offsetsDavid Blaikie2014-03-07
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203186 91177308-0d34-0410-b5e6-96231b3b80d8
* DebugInfo: Improve test to not depend on the specific naming of temporary ↵David Blaikie2014-03-07
| | | | | | symbols git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203184 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove shouldEmitUsedDirectiveFor.Rafael Espindola2014-03-06
| | | | | | Clang now uses llvm.compiler.used for these cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203174 91177308-0d34-0410-b5e6-96231b3b80d8
* Convert test to FileCheck.Rafael Espindola2014-03-06
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203173 91177308-0d34-0410-b5e6-96231b3b80d8
* [X86] Teach the DAGCombiner how to fold a OR of two shufflevector nodes.Andrea Di Biagio2014-03-06
| | | | | | | | | | | | | | | | | | | | | | | | This patch teaches the DAGCombiner how to fold a binary OR between two shufflevector into a single shuffle vector when possible. The rules are: 1. fold (or (shuf A, V_0, MA), (shuf B, V_0, MB)) -> (shuf A, B, Mask1) 2. fold (or (shuf A, V_0, MA), (shuf B, V_0, MB)) -> (shuf B, A, Mask2) The DAGCombiner can take advantage of the fact that OR is commutative and compute two possible shuffle masks (Mask1 and Mask2) for the resulting shuffle node. Before folding a dag according to either rule 1 or 2, DAGCombiner verifies that the resulting shuffle mask is legal for the target. DAGCombiner would firstly try to fold according to 1.; If not possible then it will try to fold according to 2. If both Mask1 and Mask2 are illegal then we conservatively don't fold the OR instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203156 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the printing of n_type.Rafael Espindola2014-03-06
| | | | | | | Despite the name, n_type contains the type of the symbol, but also if it is extern or private extern. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203154 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Fix extloads from i8 / i16 to i64.Matt Arsenault2014-03-06
| | | | | | | This appears to only be working for global loads. Private and local break for other reasons. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203135 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: Expand selects on vectors.Matt Arsenault2014-03-06
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203134 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach lint about address spacesMatt Arsenault2014-03-06
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203132 91177308-0d34-0410-b5e6-96231b3b80d8
* [XCore] Add support for the "m" inline asm constraint.Richard Osborne2014-03-06
| | | | | | | | | | | | | | Summary: This provides support for CP and DP relative global accesses in inline asm. Reviewers: robertlytton Reviewed By: robertlytton Differential Revision: http://llvm-reviews.chandlerc.com/D2943 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203129 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] This is a work in progress to provide a machine descriptionChad Rosier2014-03-06
| | | | | | | | | | | | | | | | | | | for the Cortex-A53 subtarget in the AArch64 backend. This patch lays the ground work to annotate each AArch64 instruction (no NEON yet) with a list of SchedReadWrite types. The patch also provides the Cortex-A53 processor resources, maps those the the default SchedReadWrites, and provides basic latency. NEON support will be added in a subsequent patch with proper forwarding logic. Verification was done by setting the pre-RA scheduler to linearize to better gauge the effect of the MIScheduler. Even without modeling the forward logic, the results show a modest improvement for Cortex-A53. Reviewers: apazos, mcrosier, atrick Patch by Dave Estes <cestes@codeaurora.org>! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203125 91177308-0d34-0410-b5e6-96231b3b80d8
* AVX-512: Added rrk, rrkz, rmk, rmkz, rmbk, rmbkz versions of AVX512 FP ↵Elena Demikhovsky2014-03-06
| | | | | | | | | packed instructions, added encoding tests for them. By Robert Khazanov. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203098 91177308-0d34-0410-b5e6-96231b3b80d8
* AVX-512: fixed comressed displacement - by Robert KhazanovElena Demikhovsky2014-03-06
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203096 91177308-0d34-0410-b5e6-96231b3b80d8
* DebugInfo: Tag units as having been indexed in GNU pubnames by using a ↵David Blaikie2014-03-06
| | | | | | | | | | DW_AT_GNU_pubnames of DW_FORM_flag(_present) rather than sec_offsets to the pubnames/types sections This is consistent with GDB ToT and reduces the number of relocations in (type and compile) units, substantially reducing relocations and debug size in fission + type units builds. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203082 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow constant folding of copysignKarthik Bhat2014-03-06
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203076 91177308-0d34-0410-b5e6-96231b3b80d8
* DebugInfo: Shrink pubnames/pubtypes in the presence of type units by only ↵David Blaikie2014-03-06
| | | | | | emitting pub sections for compile units git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203057 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixup PPC Darwin i1 argument handlingHal Finkel2014-03-06
| | | | | | | Like on other targets, we need to zero_extend/truncate i1 args before copying them to GPRs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203045 91177308-0d34-0410-b5e6-96231b3b80d8
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