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* llvm-cov: Ignore missing .gcda filesJustin Bogner2014-02-04
| | | | | | | | When gcov is run without gcda data, it acts as if the counts are all zero and labels the file as - to indicate that there was no data. We should do the same. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200740 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-cov: Document the llvm-cov testsJustin Bogner2014-02-04
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200739 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert: ARM: Enable use of relocation type tlsldo in debug info for tls data.Kai Nacke2014-02-04
| | | | | | | | There seems to be a new problem with the debug info in the test case. I'll have to investigate this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200737 91177308-0d34-0410-b5e6-96231b3b80d8
* Add strchr(p, 0) -> p + strlen(p) to SimplifyLibCallsKai Nacke2014-02-04
| | | | | | | | | | Add the missing transformation strchr(p, 0) -> p + strlen(p) to SimplifyLibCalls and remove the ToDo comment. Reviewer: Duncan P.N. Exan Smith git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200736 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: Enable use of relocation type tlsldo in debug info for tls data.Kai Nacke2014-02-04
| | | | | | | | | This fixes PR18554. Reviewers: Renato Golin, Keith Walker git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200735 91177308-0d34-0410-b5e6-96231b3b80d8
* DebugInfo: Remove some unneeded conditionals now that DIBuilder no longer ↵David Blaikie2014-02-04
| | | | | | | | | | | emits zero-length arrays as {i32 0} A bunch of test cases needed to be cleaned up for this, many my fault - when implementid imported modules I updated test cases by simply duplicating the prior metadata field - which wasn't always the empty metadata entry. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200731 91177308-0d34-0410-b5e6-96231b3b80d8
* inalloca: Don't remove dead arguments in the presence of inalloca argsReid Kleckner2014-02-03
| | | | | | | | | | | | It disturbs the layout of the parameters in memory and registers, leading to problems in the backend. The plan for optimizing internal inalloca functions going forward is to essentially SROA the argument memory and demote any captured arguments (things that aren't trivially written by a load or store) to an indirect pointer to a static alloca. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200717 91177308-0d34-0410-b5e6-96231b3b80d8
* AArch64 & ARM: refactor crypto intrinsics to take scalarsTim Northover2014-02-03
| | | | | | | | | | | | Some of the SHA instructions take a scalar i32 as one argument (largely because they work on 160-bit hash fragments). This wasn't reflected in the IR previously, with ARM and AArch64 choosing different types (<4 x i32> and <1 x i32> respectively) which was ugly. This makes all the affected intrinsics take a uniform "i32", allowing them to become non-polymorphic at the same time. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200706 91177308-0d34-0410-b5e6-96231b3b80d8
* Expand vector bswap in LegalizeVectorOpsHal Finkel2014-02-03
| | | | | | | ISD::BSWAP was missing from the list of node types that should be expanded element-wise. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200705 91177308-0d34-0410-b5e6-96231b3b80d8
* Lower llvm.expect intrinsic correctly for i1Duncan P. N. Exon Smith2014-02-02
| | | | | | | | | | LowerExpectIntrinsic previously only understood the idiom of an expect intrinsic followed by a comparison with zero. For llvm.expect.i1, the comparison would be stripped by the early-cse pass. Patch by Daniel Micay. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200664 91177308-0d34-0410-b5e6-96231b3b80d8
* LoopVectorizer: Enable unrolling of conditional stores and the load/storeArnold Schwaighofer2014-02-02
| | | | | | | | | unrolling heuristic per default Benchmarking on x86_64 (thanks Chandler!) and ARM has shown those options speed up some benchmarks while not causing any interesting regressions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200621 91177308-0d34-0410-b5e6-96231b3b80d8
* Add some xfailed R600 tests for 64-bit private accesses.Matt Arsenault2014-02-02
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200620 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: Fix insertelement with dynamic indices.Matt Arsenault2014-02-02
| | | | | | | | This didn't work for any integer vectors, and didn't work with some sizes of float vectors. This should now work with all sizes of float and i32 vectors. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200619 91177308-0d34-0410-b5e6-96231b3b80d8
* [Sparc] Set %o7 as the return address register instead of %i7 in ↵Venkatraman Govindaraju2014-02-01
| | | | | | MCRegisterInfo. Also, add CFI instructions to initialize the frame correctly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200617 91177308-0d34-0410-b5e6-96231b3b80d8
* ARMTTI: We don't have 16 allocatable scalar registersArnold Schwaighofer2014-02-01
| | | | | | | This caused an regression on libquantum after enabling the new loop vectorizer unroll heuristics. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200616 91177308-0d34-0410-b5e6-96231b3b80d8
* MC: Fix .octa output for APInts with BitWidth > 128David Woodhouse2014-02-01
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200615 91177308-0d34-0410-b5e6-96231b3b80d8
* MC: Add support for .octaDavid Woodhouse2014-02-01
| | | | | | | | | | This is a minimal implementation which accepts only constants rather than full expressions, but that should be perfectly sufficient for all known users for now. Patch from PaX Team <pageexec@freemail.hu> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200614 91177308-0d34-0410-b5e6-96231b3b80d8
* [LPM] Apply a really big hammer to fix PR18688 by recursively reformingChandler Carruth2014-02-01
| | | | | | | | | | | | | | | | | | | | LCSSA when we promote to SSA registers inside of LICM. Currently, this is actually necessary. The promotion logic in LICM uses SSAUpdater which doesn't understand how to place LCSSA PHI nodes. Teaching it to do so would be a very significant undertaking. It may be worthwhile and I've left a FIXME about this in the code as well as starting a thread on llvmdev to try to figure out the right long-term solution. For now, the PR needs to be fixed. Short of using the promition SSAUpdater to place both the LCSSA PHI nodes and the promoted PHI nodes, I don't see a cleaner or cheaper way of achieving this. Fortunately, LCSSA is relatively lazy and sparse -- it should only update instructions which need it. We can also skip the recursive variant when we don't promote to SSA values. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200612 91177308-0d34-0410-b5e6-96231b3b80d8
* [inliner] Skip debug intrinsics even earlier in computing the inlineChandler Carruth2014-02-01
| | | | | | | | | | | | | | | | | | | | | | | cost so that they don't impact the vector bonus. Fundamentally, counting unsimplified instructions is just *wrong*; it will continue to introduce instability as things which do not generate code bizarrely impact inlining. For example, sufficiently nested inlined functions could turn off the vector bonus with lifetime markers just like the debug intrinsics do. =/ This is a short-term tactical fix. Long term, I think we need to remove the vector bonus entirely. That's a separate patch and discussion though. The patch to fix this provided by Dario Domizioli. I've added some comments about the planned direction and used a heavily pruned form of debug info intrinsics for the test case. While this debug info doesn't work or "do" anything useful, it lets us easily test all manner of interference easily, and I suspect this will not be the last time we want to craft a pattern where debug info interferes with the inliner in a problematic way. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200609 91177308-0d34-0410-b5e6-96231b3b80d8
* Update a .fill test to use the updated semantics.David Majnemer2014-02-01
| | | | | | | Something funny happened, this should've been part of r200606. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200607 91177308-0d34-0410-b5e6-96231b3b80d8
* MC: Improve the .fill directive's compatibility with GASDavid Majnemer2014-02-01
| | | | | | | | | | Per the GAS documentation, .fill should permit pattern widths that aren't a power of two. While I was in the neighborhood, I added some sanity checking. This change was motivated by a use of this construct in the Linux Kernel. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200606 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "[SLPV] Recognize vectorizable intrinsics during SLP vectorization ..."Reid Kleckner2014-02-01
| | | | | | | This reverts commit r200576. It broke 32-bit self-host builds by vectorizing two calls to @llvm.bswap.i64, which we then fail to expand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200602 91177308-0d34-0410-b5e6-96231b3b80d8
* [stackprotector] Implement the sspstrong rules for stack layout.Josh Magee2014-02-01
| | | | | | | | | | | | | | | | | | | This changes the PrologueEpilogInserter and LocalStackSlotAllocation passes to follow the extended stack layout rules for sspstrong and sspreq. The sspstrong layout rules are: 1. Large arrays and structures containing large arrays (>= ssp-buffer-size) are closest to the stack protector. 2. Small arrays and structures containing small arrays (< ssp-buffer-size) are 2nd closest to the protector. 3. Variables that have had their address taken are 3rd closest to the protector. Differential Revision: http://llvm-reviews.chandlerc.com/D2546 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200601 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement inalloca codegen for x86 with the new inalloca designReid Kleckner2014-01-31
| | | | | | | | | | | | | | | | Calls with inalloca are lowered by skipping all stores for arguments passed in memory and the initial stack adjustment to allocate argument memory. Now the frontend is responsible for the memory layout, and the backend doesn't have to do any work. As a result these changes are pretty minimal. Reviewers: echristo Differential Revision: http://llvm-reviews.chandlerc.com/D2637 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200596 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't put non-static allocas in the static alloca mapReid Kleckner2014-01-31
| | | | | | | | Allocas marked inalloca are never static, but we were trying to put them into the static alloca map if they were in the entry block. Also add an assertion in x86 fastisel. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200593 91177308-0d34-0410-b5e6-96231b3b80d8
* Split out small-code-model MCJIT testcase in order to xfail for AArch64, whereLang Hames2014-01-31
| | | | | | | PC-rel relocations aren't yet fully implemented. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200592 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove another hasRawTextSupport.Rafael Espindola2014-01-31
| | | | | | | | | To remove this one simply move the end of file logic from the asm printer to the target mc streamer. This removes the last call to hasRawTextSupport from lib/Target. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200590 91177308-0d34-0410-b5e6-96231b3b80d8
* Set -mcpu to make this test pass on atom botsReid Kleckner2014-01-31
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200588 91177308-0d34-0410-b5e6-96231b3b80d8
* Mark the first dynamic elf symbol as SF_FormatSpecific.Rafael Espindola2014-01-31
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200578 91177308-0d34-0410-b5e6-96231b3b80d8
* Replace X86 FMA intrinsic pseduo-instructions with def pats.Lang Hames2014-01-31
| | | | | | | | | | | | | It looks like these pseudos were only used for pattern matching. Def pats are the appropriate way to do that. As a bonus, these intrinsics will now have memory operands folded properly, and better FMA3 variants selected where appropriate (see r199933). <rdar://problem/15611947> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200577 91177308-0d34-0410-b5e6-96231b3b80d8
* [SLPV] Recognize vectorizable intrinsics during SLP vectorization andChandler Carruth2014-01-31
| | | | | | | | | | transform accordingly. Based on similar code from Loop vectorization. Subsequent commits will include vectorization of function calls to vector intrinsics and form function calls to vector library calls. Patch by Raul Silvera! (Much delayed due to my not running dcommit) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200576 91177308-0d34-0410-b5e6-96231b3b80d8
* DebugInfo: Flag type unit references as declarationsDavid Blaikie2014-01-31
| | | | | | | | | This ensures DWARF consumers don't confuse these references for definitions. I'd argue it might be nice to improve debuggers so we don't need this, but it's just one field in an abbreviation anyway - so it doesn't seem worth the fight. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200569 91177308-0d34-0410-b5e6-96231b3b80d8
* [ms-cxxabi] Add a new calling convention that swaps 'this' and 'sret'Reid Kleckner2014-01-31
| | | | | | | | | | | | | | | | | | | | MSVC always places the 'this' parameter for a method first. The implicit 'sret' pointer for methods always comes second. We already implement this for __thiscall by putting sret parameters on the stack, but __cdecl methods require putting both parameters on the stack in opposite order. Using a special calling convention allows frontends to keep the sret parameter first, which avoids breaking lots of assumptions in LLVM and Clang. Fixes PR15768 with the corresponding change in Clang. Reviewers: ributzka, majnemer Differential Revision: http://llvm-reviews.chandlerc.com/D2663 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200561 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips][msa] Add insert.d instruction.Matheus Almeida2014-01-31
| | | | | | | This instruction is only available on Mips64 cores that implement the MSA ASE. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200543 91177308-0d34-0410-b5e6-96231b3b80d8
* Update FileCheck prefixes in preparation for the addition of Mips64 MSA tests.Matheus Almeida2014-01-31
| | | | | | | No functional changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200541 91177308-0d34-0410-b5e6-96231b3b80d8
* [vectorizer] Tweak the way we do small loop runtime unrolling in theChandler Carruth2014-01-31
| | | | | | | | | | | | | | loop vectorizer to not do so when runtime pointer checks are needed and share code with the new (not yet enabled) load/store saturation runtime unrolling. Also ensure that we only consider the runtime checks when the loop hasn't already been vectorized. If it has, the runtime check cost has already been paid. I've fleshed out a test case to cover the scalar unrolling as well as the vector unrolling and comment clearly why we are or aren't following the pattern. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200530 91177308-0d34-0410-b5e6-96231b3b80d8
* Move address override handling in X86MCCodeEmitter to a place where it works ↵Craig Topper2014-01-31
| | | | | | for VEX encoded instructions too. This allows 32-bit addressing to work in 64-bit mode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200516 91177308-0d34-0410-b5e6-96231b3b80d8
* This patch teaches the DAGCombiner how to fold insert_subvector nodesManman Ren2014-01-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | when the input is a concat_vectors and the insert replaces one of the concat halves: Lower half: fold (insert_subvector (concat_vectors X, Y), Z) -> (concat_vectors Z, Y) Upper half: fold (insert_subvector (concat_vectors X, Y), Z) -> (concat_vectors X, Z) This can be seen with the following IR: define <8 x float> @lower_half(<4 x float> %v1, <4 x float> %v2, <4 x float> %v3) { %1 = shufflevector <4 x float> %v1, <4 x float> %v2, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> %2 = tail call <8 x float> @llvm.x86.avx.vinsertf128.ps.256(<8 x float> %1, <4 x float> %v3, i8 0) The vinsertf128 intrinsic is converted into an insert_subvector node in SelectionDAGBuilder.cpp. Using AVX, without the patch this generates two vinsertf128 instructions: vinsertf128 $1, %xmm1, %ymm0, %ymm0 vinsertf128 $0, %xmm2, %ymm0, %ymm0 With the patch this is optimized into: vinsertf128 $1, %xmm1, %ymm2, %ymm0 Patch by Robert Lougher. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200506 91177308-0d34-0410-b5e6-96231b3b80d8
* PGO branch weight: update edge weights in SelectionDAGBuilder.Manman Ren2014-01-31
| | | | | | | | | | | | | | | | | When converting from "or + br" to two branches, or converting from "and + br" to two branches, we correctly update the edge weights of the two branches. The previous attempt at r200431 was reverted at r200434 because of two testing case failures. I modified my patch a little, but forgot to re-run "make check-all". Testing case CodeGen/ARM/lsr-unfolded-offset.ll is updated because of the patch's impact on branch probability which causes changes in spill placement. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200502 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow speculating llvm.sqrt, fma and fmuladdMatt Arsenault2014-01-31
| | | | | | | | This doesn't set errno, so this should be OK. Also update the documentation to explicitly state that errno are not set. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200501 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a link to a bug to a couple of FIXMEsTimur Iskhodzhanov2014-01-30
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200500 91177308-0d34-0410-b5e6-96231b3b80d8
* [x86] Fix signed relocations for i64i32imm operandsDavid Woodhouse2014-01-30
| | | | | | | | | These should end up (in ELF) as R_X86_64_32S relocs, not R_X86_64_32. Kill the horrid and incomplete special case and FIXME in EncodeInstruction() and set things up so it can infer the signedness from the ImmType just like it can the size and whether it's PC-relative. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200495 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Custom lower concat_vector patterns with v4i16, v4i32, v8i8, ↵Chad Rosier2014-01-30
| | | | | | v8i16, v16i8 types. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200491 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PR18381 - print a minimal diagnostic rather than assert on unresolved ↵Timur Iskhodzhanov2014-01-30
| | | | | | .secidx target git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200490 91177308-0d34-0410-b5e6-96231b3b80d8
* Only ELF has a dynamic symbol table. Remove it from ObjectFile.Rafael Espindola2014-01-30
| | | | | | | | | COFF has only one symbol table. MachO has a LC_DYSYMTAB, but that is not a symbol table, just extra info about the one symbol table (LC_SYMTAB). IR (coming soon) also has only one table. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200488 91177308-0d34-0410-b5e6-96231b3b80d8
* This has been fixed.Rafael Espindola2014-01-30
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200487 91177308-0d34-0410-b5e6-96231b3b80d8
* [Stackmaps] Record the stack size of each function that contains a ↵Juergen Ributzka2014-01-30
| | | | | | | | | | stackmap/patchpoint intrinsic. Re-applying the patch, but this time without using AsmPrinter methods. Reviewed by Andy git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200481 91177308-0d34-0410-b5e6-96231b3b80d8
* Explicitly specify the CPU to avoid Atom-specific assembly mismatchTimur Iskhodzhanov2014-01-30
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200473 91177308-0d34-0410-b5e6-96231b3b80d8
* Reenable ARM EHABI on Android.Evgeniy Stepanov2014-01-30
| | | | | | | Broken in r200388. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200466 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement SPARCv9 atomic_swap_64 with a pseudo.Jakob Stoklund Olesen2014-01-30
| | | | | | | | The SWAP instruction only exists in a 32-bit variant, but the 64-bit atomic swap can be implemented in terms of CASX, like the other atomic rmw primitives. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200453 91177308-0d34-0410-b5e6-96231b3b80d8
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