summaryrefslogtreecommitdiff
path: root/test
Commit message (Collapse)AuthorAge
* Implement carry for subtract/add for mips16Reed Kotler2012-10-26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166755 91177308-0d34-0410-b5e6-96231b3b80d8
* implement large (>16 bit) constant loading.Reed Kotler2012-10-26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166749 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix unexpected passes. These test do work with LTO on linux. I tested bothRafael Espindola2012-10-26
| | | | | | a cmake and an autoconf build. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166748 91177308-0d34-0410-b5e6-96231b3b80d8
* fix test setgek.ll so that it will not give false "make check" Reed Kotler2012-10-26
| | | | | | | failure in some cases git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166747 91177308-0d34-0410-b5e6-96231b3b80d8
* Port testcase to FileCheck.Rafael Espindola2012-10-26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166742 91177308-0d34-0410-b5e6-96231b3b80d8
* Disable generation of pointer vectors by BBVectorize.Hal Finkel2012-10-26
| | | | | | Once vector-of-pointer support works, then this can be reverted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166741 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert 166726 because it may have broken a number of SPEC tests. PR14183.Nadav Rotem2012-10-25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166739 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a crash in ValueTracking. Add support for vectors of pointers.Nadav Rotem2012-10-25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166726 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the cost-model test.Nadav Rotem2012-10-25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166722 91177308-0d34-0410-b5e6-96231b3b80d8
* implement mips16 patterns for select nodesReed Kotler2012-10-25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166721 91177308-0d34-0410-b5e6-96231b3b80d8
* Add CPU model to BBVectorize cost-model tests.Hal Finkel2012-10-25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166720 91177308-0d34-0410-b5e6-96231b3b80d8
* Add the cpu model to the test.Nadav Rotem2012-10-25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166718 91177308-0d34-0410-b5e6-96231b3b80d8
* Begin incorporating target information into BBVectorize.Hal Finkel2012-10-25
| | | | | | | | | | | | | | | | | | | | | | | | This is the first of several steps to incorporate information from the new TargetTransformInfo infrastructure into BBVectorize. Two things are done here: 1. Target information is used to determine if it is profitable to fuse two instructions. This means that the cost of the vector operation must not be more expensive than the cost of the two original operations. Pairs that are not profitable are no longer considered (because current cost information is incomplete, for intrinsics for example, equal-cost pairs are still considered). 2. The 'cost savings' computed for the profitability check are also used to rank the DAGs that represent the potential vectorization plans. Specifically, for nodes of non-trivial depth, the cost savings is used as the node weight. The next step will be to incorporate the shuffle costs into the DAG weighting; this will give the edges of the DAG weights as well. Once that is done, when target information is available, we should be able to dispense with the depth heuristic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166716 91177308-0d34-0410-b5e6-96231b3b80d8
* Also optimize large switch statements.Jakob Stoklund Olesen2012-10-25
| | | | | | | | | | The isValueEqualityComparison() guard at the top of SimplifySwitch() only applies to some of the possible transformations. The newer transformations work just fine on large switches, and the check on predecessor count is nonsensical. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166710 91177308-0d34-0410-b5e6-96231b3b80d8
* Add test for ATOM ISA SSSE3Michael Liao2012-10-25
| | | | | | | | - Remove SSE4.1 feature in other ATOM-based test cases git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166699 91177308-0d34-0410-b5e6-96231b3b80d8
* This patch addresses a PPC64 ELF issue with passing parameters consisting ofBill Schmidt2012-10-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | structs having size 3, 5, 6, or 7. Such a struct must be passed and received as right-justified within its register or memory slot. The problem is only present for structs that are passed in registers. Previously, as part of a patch handling all structs of size less than 8, I added logic to rotate the incoming register so that the struct was left- justified prior to storing the whole register. This was incorrect because the address of the parameter had already been adjusted earlier to point to the right-adjusted value in the storage slot. Essentially I had accidentally accounted for the right-adjustment twice. In this patch, I removed the incorrect logic and reorganized the code to make the flow clearer. The removal of the rotates changes the expected code generation, so test case structsinregs.ll has been modified to reflect this. I also added a new test case, jaggedstructs.ll, to demonstrate that structs of these sizes can now be properly received and passed. I've built and tested the code on powerpc64-unknown-linux-gnu with no new regressions. I also ran the GCC compatibility test suite and verified that earlier problems with these structs are now resolved, with no new regressions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166680 91177308-0d34-0410-b5e6-96231b3b80d8
* Initial TOC support for PowerPC64 object creationAdhemerval Zanella2012-10-25
| | | | | | | | | | | | | | | | This patch adds initial PPC64 TOC MC object creation using the small mcmodel (a single 64K TOC) adding the some TOC relocations (R_PPC64_TOC, R_PPC64_TOC16, and R_PPC64_TOC16DS). The addition of 'undefinedExplicitRelSym' hook on 'MCELFObjectTargetWriter' is meant to avoid the creation of an unreferenced ".TOC." symbol (used in the .odp creation) as well to set the R_PPC64_TOC relocation target as the temporary ".TOC." symbol. On PPC64 ABI, the R_PPC64_TOC relocation should not point to any symbol. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166677 91177308-0d34-0410-b5e6-96231b3b80d8
* The test avx-intel-ocl.ll failed. I can't reproduce on any of my machines. I ↵Elena Demikhovsky2012-10-25
| | | | | | added -mcpu flag, may be it will fix the problem git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166669 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach SROA how to split whole-alloca integer loads and stores intoChandler Carruth2012-10-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | smaller integer loads and stores. The high-level motivation is that the frontend sometimes generates a single whole-alloca integer load or store during ABI lowering of splittable allocas. We need to be able to break this apart in order to see the underlying elements and properly promote them to SSA values. The hope is that this fixes some performance regressions on x86-32 with the new SROA pass. Unfortunately, this causes quite a bit of churn in the test cases, and bloats some IR that comes out. When we see an alloca that consists soley of bits and bytes being extracted and re-inserted, we now do some splitting first, before building widened integer "bucket of bits" representations. These are always well folded by instcombine however, so this shouldn't actually result in missed opportunities. If this splitting of all-integer allocas does cause problems (perhaps due to smaller SSA values going into the RA), we could potentially go to some extreme measures to only do this integer splitting trick when there are non-integer component accesses of an alloca, but discovering this is quite expensive: it adds yet another complete walk of the recursive use tree of the alloca. Either way, I will be watching build bots and LNT bots to see what fallout there is here. If anyone gets x86-32 numbers before & after this change, I would be very interested. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166662 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for additional reduction variables: AND, OR, XOR.Nadav Rotem2012-10-25
| | | | | | | | Patch by Paul Redmond <paul.redmond@intel.com>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166649 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement a basic cost model for vector and scalar instructions. Nadav Rotem2012-10-24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166642 91177308-0d34-0410-b5e6-96231b3b80d8
* Tell llvm-mc we're using intel syntax, so we don't have to use directives.Chad Rosier2012-10-24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166640 91177308-0d34-0410-b5e6-96231b3b80d8
* [ms-inline asm] Add back-end test case for r166632. Make sure we emit theChad Rosier2012-10-24
| | | | | | | | correct .s output as well as get the correct encoding by the integrated assembler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166638 91177308-0d34-0410-b5e6-96231b3b80d8
* Update GVN to support vectors of pointers.Hal Finkel2012-10-24
| | | | | | | GVN will now generate ptrtoint instructions for vectors of pointers. Fixes PR14166. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166624 91177308-0d34-0410-b5e6-96231b3b80d8
* LoopVectorizer: Add a basic cost model which uses the VTTI interface.Nadav Rotem2012-10-24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166620 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a miscompilation caused by a typo. When turning a adde with negative valueEvan Cheng2012-10-24
| | | | | | | | | | into a sbc with a positive number, the immediate should be complemented, not negated. Also added a missing pattern for ARM codegen. rdar://12559385 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166613 91177308-0d34-0410-b5e6-96231b3b80d8
* getSmallConstantTripMultiple should never return zero.Hal Finkel2012-10-24
| | | | | | | | | When the trip count is -1, getSmallConstantTripMultiple could return zero, and this would cause runtime loop unrolling to assert. Instead of returning zero, one is now returned (consistent with the existing overflow cases). Fixes PR14167. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166612 91177308-0d34-0410-b5e6-96231b3b80d8
* Add in support for getIntPtrType to get the pointer type based on the ↵Micah Villmow2012-10-24
| | | | | | | | | | address space. This checkin also adds in some tests that utilize these paths and updates some of the clients. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166578 91177308-0d34-0410-b5e6-96231b3b80d8
* Special calling conventions for Intel OpenCL built-in library.Elena Demikhovsky2012-10-24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166566 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a testcase that would have noticed the typo fixed in commit 166475.Duncan Sands2012-10-24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166547 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach DAG combine to fold (buildvec (Xint2fp x)) to (Xint2fp (buildvec x))Michael Liao2012-10-24
| | | | | | | | | | - If more than 1 elemennts are defined and target supports the vectorized conversion, use the vectorized one instead to reduce the strength on conversion operation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166546 91177308-0d34-0410-b5e6-96231b3b80d8
* Add custom conversion from v2u32 to v2f32 in 32-bit modeMichael Liao2012-10-24
| | | | | | | | | - As there's no 64-bit GPRs in 32-bit mode, a custom conversion from v2u32 to v2f32 is added to improve the efficiency of the code generated. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166545 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Make sure sret argument is returned in register V0.Akira Hatanaka2012-10-24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166539 91177308-0d34-0410-b5e6-96231b3b80d8
* Change x86_fastcallcc to require inreg markers. This allows it to knownRafael Espindola2012-10-24
| | | | | | | | | the difference from "int x" (which should go in registers and "struct y {int x;}" (which should not). Clang will be updated in the next patches. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166536 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PR14161Michael Liao2012-10-23
| | | | | | | | | - Check index being extracted to be constant 0 before simplfiying. Otherwise, retain the original sequence. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166504 91177308-0d34-0410-b5e6-96231b3b80d8
* Use the AliasAnalysis isIdentifiedObj because it also understands mallocs ↵Nadav Rotem2012-10-23
| | | | | | | | | | and c++ news. PR14158. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166491 91177308-0d34-0410-b5e6-96231b3b80d8
* Ignore unreachable blocks when doing memory dependence analysis on non-localBill Wendling2012-10-23
| | | | | | | | | | | | loads. It's not really profitable and may result in GVN going into an infinite loop when it hits constructs like this: %x = gep %some.type %x, ... Found via an LTO build of LLVM. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166490 91177308-0d34-0410-b5e6-96231b3b80d8
* Enable lowering ZERO_EXTEND/ANY_EXTEND to PMOVZX from SSE4.1Michael Liao2012-10-23
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166486 91177308-0d34-0410-b5e6-96231b3b80d8
* Transform code like thisDuncan Sands2012-10-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | %V = mul i64 %N, 4 %t = getelementptr i8* bitcast (i32* %arr to i8*), i32 %V into %t1 = getelementptr i32* %arr, i32 %N %t = bitcast i32* %t1 to i8* incorporating the multiplication into the getelementptr. This happens all the time in dragonegg, for example for int foo(int *A, int N) { return A[N]; } because gcc turns this into byte pointer arithmetic before it hits the plugin: D.1590_2 = (long unsigned int) N_1(D); D.1591_3 = D.1590_2 * 4; D.1592_5 = A_4(D) + D.1591_3; D.1589_6 = *D.1592_5; return D.1589_6; The D.1592_5 line is a POINTER_PLUS_EXPR, which is turned into a getelementptr on a bitcast of A_4 to i8*, so this becomes exactly the kind of IR that the transform fires on. An analogous transform (with no testcases!) already existed for bitcasts of arrays, so I rewrote it to share code with this one. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166474 91177308-0d34-0410-b5e6-96231b3b80d8
* implement setXX patternsReed Kotler2012-10-23
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166459 91177308-0d34-0410-b5e6-96231b3b80d8
* When a block ends in an indirect branch, add its successors to the machine ↵Bill Wendling2012-10-22
| | | | | | | | | | | basic block. The CFG of the machine function needs to know that the targets of the indirect branch are successors to the indirect branch. <rdar://problem/12529625> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166448 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for annotated disassembly output for X86 and arm.Kevin Enderby2012-10-22
| | | | | | | | | | | | Per the October 12, 2012 Proposal for annotated disassembly output sent out by Jim Grosbach this set of changes implements this for X86 and arm. The llvm-mc tool now has a -mdis option to produced the marked up disassembly and a couple of small example test cases have been added. rdar://11764962 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166445 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't crash if the load/store pointer is not a GEP.Nadav Rotem2012-10-22
| | | | | | | | Fix by Shivarama Rao <Shivarama.Rao@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166427 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a testcase for the previous commit.Nadav Rotem2012-10-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166425 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r166407 because it caused analyzer tests to crash and broke self-host ↵Argyrios Kyrtzidis2012-10-22
| | | | | | bots. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166424 91177308-0d34-0410-b5e6-96231b3b80d8
* BBVectorize should ignore unreachable blocks.Hal Finkel2012-10-22
| | | | | | | | | Unreachable blocks can have invalid instructions. For example, jump threading can produce self-referential instructions in unreachable blocks. Also, we should not be spending time optimizing unreachable code. Fixes PR14133. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166423 91177308-0d34-0410-b5e6-96231b3b80d8
* Vectorizer: optimize the generation of selects. If the condition is uniform, ↵Nadav Rotem2012-10-22
| | | | | | generate a scalar-cond select (i1 as selector). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166409 91177308-0d34-0410-b5e6-96231b3b80d8
* Reapply r166405, teaching tailcallelim to be smarter about nocapture, with aNick Lewycky2012-10-22
| | | | | | | | | | | | | | | | | very small but very important bugfix: bool shouldExplore(Use *U) { Value *V = U->get(); if (isa<CallInst>(V) || isa<InvokeInst>(V)) [...] should have read: bool shouldExplore(Use *U) { Value *V = U->getUser(); if (isa<CallInst>(V) || isa<InvokeInst>(V)) Fixes PR14143! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166407 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r166405, "Teach TailRecursionElimination to consider 'nocapture' when ↵NAKAMURA Takumi2012-10-22
| | | | | | | | deciding whether" It broke selfhosting stage2 in several builders. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166406 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach TailRecursionElimination to consider 'nocapture' when deciding whetherNick Lewycky2012-10-21
| | | | | | | calls can be marked tail. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166405 91177308-0d34-0410-b5e6-96231b3b80d8
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-01 07:18:31 +0000