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* Convert sqrt functions into sqrt instructions when -ffast-math is in effect.Preston Gurd2013-05-27
* Add a cpu to try to bring back the atom bots.Rafael Espindola2013-05-27
* Prefer to duplicate PPC Altivec loads when expanding unaligned loadsHal Finkel2013-05-26
* Fix PR16143: Insert DEBUG_VALUE before terminator.Andrew Trick2013-05-26
* Add support for DWARF line number table entries for values in the instructionCameron Zwarich2013-05-25
* PPC: Combine duplicate (offset) lvsl Altivec intrinsicsHal Finkel2013-05-25
* Track IR ordering of SelectionDAG nodes 4/4.Andrew Trick2013-05-25
* Track IR ordering of SelectionDAG nodes 3/4.Andrew Trick2013-05-25
* PPC: Initial support for permutation-based unaligned Altivec loadsHal Finkel2013-05-24
* [objc-arc] KnownSafe does not imply that it is safe to perform code motion ac...Michael Gottesman2013-05-24
* [objc-arc] Make sure that multiple owners is propogated correctly through the...Michael Gottesman2013-05-24
* LoopVectorize: LoopSimplify can't canonicalize loops with an indirectbr in it...Benjamin Kramer2013-05-24
* [SystemZ] Improve AsmParser handling of invalid instructionsRichard Sandiford2013-05-24
* [SystemZ] Improve AsmParser register parsingRichard Sandiford2013-05-24
* scalarizePHI needs to insert the next ExtractElement in the same blockJoey Gouly2013-05-24
* Add a new function attribute 'cold' to functions.Diego Novillo2013-05-24
* Add MCSymbolizer for symbolic/annotated disassembly.Ahmed Bougacha2013-05-24
* ARM: implement @llvm.readcyclecounter intrinsicTim Northover2013-05-23
* R600: Fix R600ControlFlowFinalizer not considering VTX_READ 128 bit dst regTom Stellard2013-05-23
* Fix PR16110: Handle DBG_VALUE in ConnectedVNInfoEqClasses::Distribute().Jakob Stoklund Olesen2013-05-23
* Add missing test from r175092.Nick Lewycky2013-05-23
* Solidify the assumption that a DW_TAG_subprogram's type is a DW_TAG_subroutin...David Blaikie2013-05-22
* SLPVectorizer: Change the order in which new instructions are added to the fu...Nadav Rotem2013-05-22
* X86: Fix a bug in EltsFromConsecutiveLoads. We can't generate new loads witho...Nadav Rotem2013-05-22
* This is an update to a previous commit (r181216).Jean-Luc Duprat2013-05-22
* X86: When expanding PCMPGTQ to PCMPGTD we always want to compare the lower ha...Benjamin Kramer2013-05-22
* LoopVectorize: Make Value pointers that could be RAUW'ed a VHArnold Schwaighofer2013-05-22
* X86: Remove test instructions proceeding shift by immediate instructionsDavid Majnemer2013-05-22
* Use std::list so that we have a stable iterator.Rafael Espindola2013-05-21
* [mips] Rename option to make it compatible with gcc.Akira Hatanaka2013-05-21
* [mips] Add instruction selection patterns for blez and bgez.Akira Hatanaka2013-05-21
* [NVPTX] Add @llvm.nvvm.sqrt.f() intrinsicJustin Holewinski2013-05-21
* Drop @llvm.annotation and @llvm.ptr.annotation intrinsics during codegen.Justin Holewinski2013-05-21
* [msan] A no-op implementation of VarArg handling.Evgeniy Stepanov2013-05-21
* X86: When emulating unsigned PCMPGTQ with PCMPGTD, fix the sign bit for the s...Benjamin Kramer2013-05-21
* [SystemZ] Tighten branch testsRichard Sandiford2013-05-21
* DAGCombine: Avoid an edge case where it tried to create an i0 type for (x & 0...Benjamin Kramer2013-05-21
* Add checks that the proper predeined stubs are being called to the test case.Reed Kotler2013-05-21
* Dwarf: use a single line table to generate assembly when .loc is used.Manman Ren2013-05-21
* Add some additional functions to the list of helper functions forReed Kotler2013-05-21
* PR14606: Debug Info for namespace aliases/DW_TAG_imported_moduleDavid Blaikie2013-05-20
* add polly to check-allSebastian Pop2013-05-20
* [mips] Add (setne $lhs, 0) instruction selection pattern.Akira Hatanaka2013-05-20
* [mips] Trap on integer division by zero.Akira Hatanaka2013-05-20
* [NVPTX] Fix mis-use of CurrentFnSym in NVPTXAsmPrinter. This was causing a s...Justin Holewinski2013-05-20
* R600: Fix rotr.ll on non-asserts buildsTom Stellard2013-05-20
* R600/SI: Add pattern for rotrTom Stellard2013-05-20
* R600: Swap the legality of rotl and rotrTom Stellard2013-05-20
* R600/SI: Add patterns for 64-bit shift operationsTom Stellard2013-05-20
* VSTn instructions have a number of encoding constraints which are not impleme...Mihai Popa2013-05-20