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* Reenable, improve, and add MI-Sched unit tests.Andrew Trick2013-06-17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184134 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: PV stores Reg id, not indexVincent Lejeune2013-06-17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184117 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Properly set COUNT_3 bit in TEX clause initiating inst for pre EG gen.Vincent Lejeune2013-06-17
| | | | | | | Fixes rv7x0 bug in Heaven reported here: https://bugs.freedesktop.org/show_bug.cgi?id=64257 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184116 91177308-0d34-0410-b5e6-96231b3b80d8
* Switch spill weights from a basic loop depth estimation to BlockFrequencyInfo.Benjamin Kramer2013-06-17
| | | | | | | | | | | | | | | | | | The main advantages here are way better heuristics, taking into account not just loop depth but also __builtin_expect and other static heuristics and will eventually learn how to use profile info. Most of the work in this patch is pushing the MachineBlockFrequencyInfo analysis into the right places. This is good for a 5% speedup on zlib's deflate (x86_64), there were some very unfortunate spilling decisions in its hottest loop in longest_match(). Other benchmarks I tried were mostly neutral. This changes register allocation in subtle ways, update the tests for it. 2012-02-20-MachineCPBug.ll was deleted as it's very fragile and the instruction it looked for was gone already (but the FileCheck pattern picked up unrelated stuff). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184105 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix for a regression caused by the LoopVectorizer whenPekka Jaaskelainen2013-06-17
| | | | | | | | | vectorizing loops with memory accesses to non-zero address spaces. It simply dropped the AS info. Fixes PR16306. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184103 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a testcase for r184074.Rafael Espindola2013-06-17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184080 91177308-0d34-0410-b5e6-96231b3b80d8
* AArch64: print relocation addends if present on AArch64Tim Northover2013-06-17
| | | | | | | llvm-objdump should provide some way of printing out the addends present in the .rela sections for debugging purposes if nothing else. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184072 91177308-0d34-0410-b5e6-96231b3b80d8
* Debug Info: Simplify Frame Index handling in DBG_VALUE Machine InstructionsDavid Blaikie2013-06-16
| | | | | | | | | | | | | | | | | | | | Rather than using the full power of target-specific addressing modes in DBG_VALUEs with Frame Indicies, simply use Frame Index + Offset. This reduces the complexity of debug info handling down to two representations of values (reg+offset and frame index+offset) rather than three or four. Ideally we could ensure that frame indicies had been eliminated by the time we reached an assembly or dwarf generation, but I haven't spent the time to figure out where the FIs are leaking through into that & whether there's a good place to convert them. Some FI+offset=>reg+offset conversion is done (see PrologEpilogInserter, for example) which is necessary for some SelectionDAG assumptions about registers, I believe, but it might be possible to make this a more thorough conversion & ensure there are no remaining FIs no matter how instruction selection is performed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184066 91177308-0d34-0410-b5e6-96231b3b80d8
* DebugInfo: follow up to 184045 to constrain the tests further to ensure they ↵David Blaikie2013-06-15
| | | | | | don't contain +0 offsets git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184046 91177308-0d34-0410-b5e6-96231b3b80d8
* DebugInfo: print DBG_VALUE MachineInstrs with [] for deref and drop the ↵David Blaikie2013-06-15
| | | | | | offset when it's zero git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184045 91177308-0d34-0410-b5e6-96231b3b80d8
* Machine Model: Add MicroOpBufferSize and resource BufferSize.Andrew Trick2013-06-15
| | | | | | | | | | | | | Replace the ill-defined MinLatency and ILPWindow properties with with straightforward buffer sizes: MCSchedMode::MicroOpBufferSize MCProcResourceDesc::BufferSize These can be used to more precisely model instruction execution if desired. Disabled some misched tests temporarily. They'll be reenabled in a few commits. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184032 91177308-0d34-0410-b5e6-96231b3b80d8
* Debug Info: Don't print the display name and colon prefix for DEBUG_VALUE ↵David Blaikie2013-06-15
| | | | | | comments if the display name is empty git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184026 91177308-0d34-0410-b5e6-96231b3b80d8
* [yaml2obj] Add support for sh_link via `Link` key.Sean Silva2013-06-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184022 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Add SI load support for v[24]i32 and store for v2i32Tom Stellard2013-06-15
| | | | | | | | | | | | Also add a seperate vector lit test file, since r600 doesn't seem to handle v2i32 load/store yet, but we can test both for SI. Patch by: Aaron Watry Reviewed-by: Tom Stellard <thomas.stellard@amd.com> Signed-off-by: Aaron Watry <awatry@gmail.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184021 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove the LLVM specific archive index.Rafael Espindola2013-06-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Archive files (.a) can have a symbol table indicating which object files in them define which symbols. The purpose of this symbol table is to speed up linking by allowing the linker the read only the .o files it is actually going to use instead of having to parse every object's symbol table. LLVM's archive library currently supports a LLVM specific format for such table. It is hard to see any value in that now that llvm-ld is gone: * System linkers don't use it: GNU ar uses the same plugin as the linker to create archive files with a regular index. The OS X ar creates no symbol table for IL files, I assume the linker just parses all IL files. * It doesn't interact well with archives having both IL and native objects. * We probably don't want to be responsible for yet another archive format variant. This patch then: * Removes support for creating and reading such index from lib/Archive. * Remove llvm-ranlib, since there is nothing left for it to do. We should in the future add support for regular indexes to llvm-ar for both native and IL objects. When we do that, llvm-ranlib should be reimplemented as a symlink to llvm-ar, as it is equivalent to "ar s". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184019 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Use correct encoding for Vertex Fetch instructions on CaymanTom Stellard2013-06-14
| | | | | | Reviewed-by: Vincent Lejeune<vljn at ovi.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184016 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Use EXPORT_RAT_INST_STORE_DWORD for stores on CaymanTom Stellard2013-06-14
| | | | | | | | | | We were using RAT_INST_STORE_RAW, which seemed to work, but the docs say this instruction doesn't exist for Cayman, so it's probably safer to use a documented instruction instead. Reviewed-by: Vincent Lejeune<vljn at ovi.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184015 91177308-0d34-0410-b5e6-96231b3b80d8
* Mark rematerialized super/sub registers as dead.Tim Northover2013-06-14
| | | | | | | | | | | | | When we're rematerializing into a not-quite-right register we already add the real definition as an imp-def, but we should also be marking the "official" register as dead, since nothing else is going to use it as a result of this remat. Not doing this can affect pressure tracking. rdar://problem/14158833 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184002 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix frame pointer debug information testJF Bastien2013-06-14
| | | | | | Run the test at O1 instead of O0: ARM FastISel keeps frame pointers around and ignores the flag. The test should now pass on ARM and still passes on x86.See: http://llvm.org/bugs/show_bug.cgi?id=16322 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183999 91177308-0d34-0410-b5e6-96231b3b80d8
* Do not to perform RUN line substitution of llc if that's prefixed by a hypnenEli Bendersky2013-06-14
| | | | | | | | | | (-llc), similarly to the way it was done for clang and llvmc. This doesn't affect the upstream llvm tests but helps when developing custom LLVM-based tools and testing them within the LLVM regression framework. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183994 91177308-0d34-0410-b5e6-96231b3b80d8
* SelectionDAG: Fix incorrect condition checks in some cases of folding ↵Stephen Lin2013-06-14
| | | | | | FADD/FMUL combinations; also improve accuracy of comments git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183993 91177308-0d34-0410-b5e6-96231b3b80d8
* Make PrologEpilogInserter save/restore all callee saved registersDerek Schuff2013-06-14
| | | | | | | | | | | in functions which call __builtin_unwind_init() __builtin_unwind_init() is an undocumented gcc intrinsic which has this effect, and is used in libgcc_eh. Goes part of the way toward fixing PR8541. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183984 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: fix thumb coprocessor instruction with pre-writeback disassemblyAmaury de la Vieuville2013-06-14
| | | | | | | was stc2 p0, c0, [r0]! instead of stc2 p0, c0, [r0,#0]! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183975 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: cvtpi2ps is just an SSE instruction with MMX operands. It has no AVX ↵Benjamin Kramer2013-06-14
| | | | | | | | equivalent. Give it the right register format so we can also emit it when AVX is enabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183971 91177308-0d34-0410-b5e6-96231b3b80d8
* Enable FastISel on ARM for Linux and NaCl, not MCJITJF Bastien2013-06-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a resubmit of r182877, which was reverted because it broken MCJIT tests on ARM. The patch leaves MCJIT on ARM as it was before: only enabled for iOS. I've CC'ed people from the original review and revert. FastISel was only enabled for iOS ARM and Thumb2, this patch enables it for ARM (not Thumb2) on Linux and NaCl, but not MCJIT. Thumb2 support needs a bit more work, mainly around register class restrictions. The patch punts to SelectionDAG when doing TLS relocation on non-Darwin targets. I will fix this and other FastISel-to-SelectionDAG failures in a separate patch. The patch also forces FastISel to retain frame pointers: iOS always keeps them for backtracking (so emitted code won't change because of this), but Linux was getting much worse code that was incorrect when using big frames (such as test-suite's lencod). I'll also fix this in a later patch, it will probably require a peephole so that FastISel doesn't rematerialize frame pointers back-to-back. The test changes are straightforward, similar to: http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20130513/174279.html They also add a vararg test that got dropped in that change. I ran all of lnt test-suite on A15 hardware with --optimize-option=-O0 and all the tests pass. All the tests also pass on x86 make check-all. I also re-ran the check-all tests that failed on ARM, and they all seem to pass. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183966 91177308-0d34-0410-b5e6-96231b3b80d8
* [yaml2obj] Add support for sh_addralign via `AddressAlign` key.Sean Silva2013-06-14
| | | | | | | For consistency, change the address in the test case from 0xDEADBEEF to 0xCAFEBABE since 0xCAFEBABE that actually has a 2-byte alignment. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183962 91177308-0d34-0410-b5e6-96231b3b80d8
* [yaml2obj] Add support for specifying raw section content.Sean Silva2013-06-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183955 91177308-0d34-0410-b5e6-96231b3b80d8
* [yaml2obj] Add sh_addr via `Address` key.Sean Silva2013-06-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183954 91177308-0d34-0410-b5e6-96231b3b80d8
* [yaml2obj] Initial ELF section support.Sean Silva2013-06-13
| | | | | | | The current functionality is extremely basic and a bit rough around the edges, but it will flesh out in future commits. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183953 91177308-0d34-0410-b5e6-96231b3b80d8
* [PowerPC] Disable fast-isel for existing -O0 tests for PowerPC.Bill Schmidt2013-06-13
| | | | | | | | | | | | | | | | | | | | | | | | | This is a preliminary patch for fast instruction selection on PowerPC. Code generation can differ between DAG isel and fast isel. Existing tests that specify -O0 were written to expect DAG isel. Make this explicit by adding -fast-isel=false to the tests. In some cases specifying -fast-isel=false produces different code even when there isn't a fast instruction selector specified. This is because TM.Options.EnableFastISel = 1 at -O0 whether or not a FastISel object exists. Thus disabling fast isel can actually produce less conservative code. Because of this, some of the expected code generation in the -O0 tests needs to be adjusted. In particular, handling of function arguments is less conservative with -fast-isel=false (see isOnlyUsedInEntryBlock() in SelectionDAGBuilder.cpp). This results in fewer stack accesses and, in some cases, reduced stack size as uselessly loaded values are no longer stored back to spill locations in the stack. No functional change with this patch; test case adjustments only. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183939 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix DeleteDeadVarargs not to crash on functions referenced by BlockAddressesDerek Schuff2013-06-13
| | | | | | | | | | | | | | | This pass was assuming that if hasAddressTaken() returns false for a function, the function's only uses are call sites. That's not true because there can be references by BlockAddresses too. Fix the pass to handle this case. Fix BlockAddress::replaceUsesOfWithOnConstant() to allow a function's type to be changed by RAUW'ing the function with a bitcast of the recreated function. Patch by Mark Seaborn. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183933 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: fix B decodingAmaury de la Vieuville2013-06-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183914 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: fix t2am_imm8_offset operand printing for imm=#-0Amaury de la Vieuville2013-06-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183913 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: Make the cmov aliases work with intel syntax too.Benjamin Kramer2013-06-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183907 91177308-0d34-0410-b5e6-96231b3b80d8
* readobj: Dump PE/COFF optional records.Rui Ueyama2013-06-12
| | | | | | | | | | | | These records are mandatory for executables and are used by the loader. Reviewers: rafael CC: llvm-commits Differential Revision: http://llvm-reviews.chandlerc.com/D939 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183852 91177308-0d34-0410-b5e6-96231b3b80d8
* Always remove an alias when we rename the target.Rafael Espindola2013-06-12
| | | | | | Should fix the dragonegg build bots. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183845 91177308-0d34-0410-b5e6-96231b3b80d8
* Convert test to FileCheck.Rafael Espindola2013-06-12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183843 91177308-0d34-0410-b5e6-96231b3b80d8
* [MC/DWARF] Support .debug_frame / .debug_line code alignment factorsUlrich Weigand2013-06-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | I've been comparing the object file output of LLVM's integrated assembler against the external assembler on PowerPC, and one area where differences still remain are in DWARF sections. In particular, the GNU assembler generates .debug_frame and .debug_line sections using a code alignment factor of 4, since all PowerPC instructions have size 4 and must be aligned to a multiple of 4. However, current MC code hard-codes a code alignment factor of 1. This patch changes this by adding a "minimum instruction alignment" data element to MCAsmInfo and using this as code alignment factor. This requires passing a MCContext into MCDwarfLineAddr::Encode and MCDwarfLineAddr::EncodeAdvanceLoc. Note that one caller, MCDwarfLineAddr::Write, didn't actually have that information available. However, it turns out that this routine is in fact never used in the whole code base, so the patch simply removes it. If it turns out to be needed again at a later time, it could be re-added with an updated interface. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183834 91177308-0d34-0410-b5e6-96231b3b80d8
* [PowerPC] Use assembler source in MC testsUlrich Weigand2013-06-12
| | | | | | | | | | | | | | A couple of old test cases in test/MC/PowerPC were still using LLVM IR. Now that we have a working assembler, we can move them to assembler tests instead: ppc64-initial-cfa.ll ppc64-relocs-01.ll ppc64-tls-relocs-01.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183829 91177308-0d34-0410-b5e6-96231b3b80d8
* [yaml2obj] Remove fragile test case.Sean Silva2013-06-12
| | | | | | | | | | This test case was a "sanity check"/"breathing" test case at first, but is really fragile, which impairs changes to yaml2obj. `test/Object/yaml2obj-elf-bits-endian.test` is much more robust and serves as an adequate sanity check. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183811 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Add an IR transformation pass that optimizes calls to sqrt.Akira Hatanaka2013-06-11
| | | | | | | | | | The pass emits a call to sqrt that has attribute "read-none". This call will be converted to an ISD::FSQRT node during DAG construction, which will turn into a mips native sqrt instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183802 91177308-0d34-0410-b5e6-96231b3b80d8
* Change how globalopt handles aliases in llvm.used.Rafael Espindola2013-06-11
| | | | | | | | | | | | | | | | | | | | | | | | Instead of a custom implementation of replaceAllUsesWith, we just call replaceAllUsesWith and recreate llvm.used and llvm.compiler-used. This change is particularity interesting because it makes llvm see through what clang is doing with static used functions in extern "C" contexts. With this change, running clang -O2 in extern "C" { __attribute__((used)) static void foo() {} } produces @llvm.used = appending global [1 x i8*] [i8* bitcast (void ()* @foo to i8*)], section "llvm.metadata" define internal void @foo() #0 { entry: ret void } git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183756 91177308-0d34-0410-b5e6-96231b3b80d8
* Rework r183728, suppress assert(0) for now. Its behavior depends on ↵NAKAMURA Takumi2013-06-11
| | | | | | | | assertions on win32 hosts. FIXME: Introduce yet another checker but assert(0). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183736 91177308-0d34-0410-b5e6-96231b3b80d8
* It adds support for negative zero offsets for loads and stores.Mihai Popa2013-06-11
| | | | | | | Negative zero is returned by the primary expression parser as INT32_MIN, so all that the method needs to do is to accept this value. Behavior already present for Thumb2. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183734 91177308-0d34-0410-b5e6-96231b3b80d8
* This patch adds support for FPINST/FPINST2 as operands to vmsr/vmrs. These ↵Mihai Popa2013-06-11
| | | | | | are optional registers that may be supported some ARM implementations to aid with resolution of floating point exceptions. The manual pages for vmsr and vmrs do not detail their use. Encodings and other information can be found in ARM Architecture Reference Manual section F, chapter 6, paragraph 3. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183733 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: Enforce decoding rules for VLDn instructionsAmaury de la Vieuville2013-06-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183731 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: Fix STREX/LDREX reecodingAmaury de la Vieuville2013-06-11
| | | | | | The decoded MCInst wasn't reencoded as the same instruction git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183729 91177308-0d34-0410-b5e6-96231b3b80d8
* Tweak a couple of tests on win32 hosts with +Asserts.NAKAMURA Takumi2013-06-11
| | | | | | | | | - Don't use assert(0), or tests may pass or fail according to assertions. - For now, The tests are marked as XFAIL for win32 hosts. FIXME: Could we avoid XFAIL to specify triple in the RUN lines? git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183728 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix dubious type name similar to member name.Sean Silva2013-06-11
| | | | | | Should bring bots back to life. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183715 91177308-0d34-0410-b5e6-96231b3b80d8
* [yaml2obj] Initial ELF support.Sean Silva2013-06-10
| | | | | | | | | Currently, only emitting the ELF header is supported (no sections or segments). The ELFYAML code organization is broadly similar to the COFFYAML code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183711 91177308-0d34-0410-b5e6-96231b3b80d8
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