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* Add -disable-debug-info-verifier to a RUN line.Rafael Espindola2013-07-24
| | | | | | Found by running the test with pipefail enabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187046 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a problem I introduced in r187029 where we would over-eagerlyChandler Carruth2013-07-24
| | | | | | | | schedule an alloca for another iteration in SROA. This only showed up with a mixture of promotable and unpromotable selects and phis. Added a test case for this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187031 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PR16687 where we were incorrectly promoting an alloca that hadChandler Carruth2013-07-24
| | | | | | | | | | | | | | | | | | | | | | pending speculation for a phi node. The problem here is that we were using growth of the specluation set as an indicator of whether speculation would occur, and if the phi node is already in the set we don't see it grow. This is a symptom of the fact that this signal is a total hack. Unfortunately, I couldn't really come up with a non-hacky way of signaling that promotion remains valid *after* speculation occurs, such that we only speculate when all else looks good for promotion. In the end, I went with at least a much more explicit approach of doing the work of queuing inside the phi and select processing and setting a preposterously named flag to convey that we're in the special state of requiring speculating before promotion. Thanks to Richard Trieu and Nick Lewycky for the excellent work reducing a testcase for this from a pretty giant, nasty assert in a big application. =] The testcase was excellent. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187029 91177308-0d34-0410-b5e6-96231b3b80d8
* Update testing cases to make them pass debug info verification.Manman Ren2013-07-24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187016 91177308-0d34-0410-b5e6-96231b3b80d8
* DAGCombiner: Pass the correct type to TargetLowering::isF(Abs|Neg)FreeTom Stellard2013-07-23
| | | | | | | This commit also implements these functions for R600 and removes a test case that was relying on the buggy behavior. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187007 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Treat CONSTANT_ADDRESS loads like GLOBAL_ADDRESS loads when necessaryTom Stellard2013-07-23
| | | | | | | | | | These are really the same address space in hardware. The only difference is that CONSTANT_ADDRESS uses a special cache for faster access. When we are unable to use the constant kcache for some reason (e.g. smaller types or lack of indirect addressing) then the instruction selector must use GLOBAL_ADDRESS loads instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187006 91177308-0d34-0410-b5e6-96231b3b80d8
* Debug Info: improve the Finder.Manman Ren2013-07-23
| | | | | | | | Improve the Finder to handle context of a DIVariable. If Scope is a DICompileUnit, add it to the list of CUs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187003 91177308-0d34-0410-b5e6-96231b3b80d8
* [ARM][ISel] Improve the lowering of vector loads.Quentin Colombet2013-07-23
| | | | | | | | | | | | | | | | | | When vectors are built from a single value, the ARM lowering issues a scalar_to_vector node. This node is then always morphed into a move from the general purpose unit to the vector unit. When the value comes from a load, this can be simplified into a vector load to the right lane. This patch changes the lowering of insert_vector_elt to expose a vector friendly pattern in this situation. This is a step toward fixing <rdar://problem/14170854>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186999 91177308-0d34-0410-b5e6-96231b3b80d8
* Add not so that these tests pass with pipefail enabled.Rafael Espindola2013-07-23
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186939 91177308-0d34-0410-b5e6-96231b3b80d8
* Add -disable-debug-info-verifier.Rafael Espindola2013-07-23
| | | | | | Found while testing with pipefail enabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186937 91177308-0d34-0410-b5e6-96231b3b80d8
* Add an initial implementation of archive symbol table generation.Rafael Espindola2013-07-23
| | | | | | | | | | | The symbol table has forward references in the file. Instead of allocating a temporary buffer or counting the size and then writing, this implementation writes a dummy value first and patches it once the final value is known. There is room for performance improvement. I will implement them as soon as I get some other features (like a ranlib mode) in. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186934 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm/test/DebugInfo/X86/dbg-value-range.ll: Add ↵NAKAMURA Takumi2013-07-23
| | | | | | -disable-debug-info-verifier, too, since r186902. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186930 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't let x86 asm printer use the no operand movsd alias. It should use the ↵Craig Topper2013-07-23
| | | | | | normal movsl instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186924 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Add support for 24-bit MAD instructionsTom Stellard2013-07-23
| | | | | | Reviewed-by: Vincent Lejeune <vljn at ovi.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186923 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Add support for 24-bit MUL instructionsTom Stellard2013-07-23
| | | | | | Reviewed-by: Vincent Lejeune <vljn at ovi.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186922 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Improve support for < 32-bit loadsTom Stellard2013-07-23
| | | | | | Reviewed-by: Vincent Lejeune <vljn at ovi.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186921 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Move CONST_ADDRESS folding into AMDGPUDAGToDAGISel::Select()Tom Stellard2013-07-23
| | | | | | | | | | | This increases the number of opportunites we have for folding. With the previous implementation we were unable to fold into any instructions other than the first when multiple instructions were selected from a single SDNode. Reviewed-by: Vincent Lejeune <vljn at ovi.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186919 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Use KCache for kernel argumentsTom Stellard2013-07-23
| | | | | | Reviewed-by: Vincent Lejeune <vljn at ovi.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186918 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Use the same compute kernel calling convention for all GPUsTom Stellard2013-07-23
| | | | | | | | | A side-effect of this is that now the compiler expects kernel arguments to be 4-byte aligned. Reviewed-by: Vincent Lejeune <vljn at ovi.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186916 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Use correct LoadExtType when lowering kernel argumentsTom Stellard2013-07-23
| | | | | | Reviewed-by: Vincent Lejeune <vljn at ovi.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186915 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Clean up extended load patternsTom Stellard2013-07-23
| | | | | | Reviewed-by: Vincent Lejeune <vljn at ovi.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186914 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Expand vector FNEGTom Stellard2013-07-23
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186913 91177308-0d34-0410-b5e6-96231b3b80d8
* Debug Info Finder: use processDeclare and processValue to list debug infoManman Ren2013-07-23
| | | | | | | | | | | | MDNodes used by DbgDeclareInst and DbgValueInst. Another 16 testing cases failed and they are disabled with -disable-debug-info-verifier. A total of 34 cases are disabled with -disable-debug-info-verifier and will be corrected. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186902 91177308-0d34-0410-b5e6-96231b3b80d8
* When we vectorize across multiple basic blocks we may vectorize PHINodes ↵Nadav Rotem2013-07-22
| | | | | | that create a cycle. We already break the cycle on phi-nodes, but arithmetic operations are still uplicated. This patch adds code that checks if the operation that we are vectorizing was vectorized during the visit of the operands and uses this value if it can. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186883 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the move to/from accumulator register instructions that use a full 64-bitKevin Enderby2013-07-22
| | | | | | | | | absolute address encoded in the instruction. rdar://8612627 and rdar://14299221 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186878 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix typo in test.Jakub Staszak2013-07-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186876 91177308-0d34-0410-b5e6-96231b3b80d8
* Recommit r186813: More Intel syntax alias fixes. With the addition of ↵Craig Topper2013-07-22
| | | | | | suppressing some of the aliases from being emitted by the asm printer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186869 91177308-0d34-0410-b5e6-96231b3b80d8
* Recommit r186217 with testcase fix:Bill Wendling2013-07-22
| | | | | | | | | | | Use the function attributes to pass along the stack protector buffer size. Now that we have robust function attributes, don't use a command line option to specify the stack protecto buffer size. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186863 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Fix MipsAsmParser::parseCCRRegs.Akira Hatanaka2013-07-22
| | | | | | | | | | Enable parsing all 32 floating point control registers $0-31 and stop trying to parse floating point condition code register $fcc0. Also, return ParseFail if the operand being parsed is not in the expected format. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186861 91177308-0d34-0410-b5e6-96231b3b80d8
* Mark ELF's first symbol as format specific so that llvm-nm ignores it.Rafael Espindola2013-07-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186860 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Use ADDu instead of OR to copy general purpose registers. Also, deleteAkira Hatanaka2013-07-22
| | | | | | | | | the InstAlias pattern which maps "move" to OR to resolve ambiguity in MatchTable. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186855 91177308-0d34-0410-b5e6-96231b3b80d8
* This adds range checking for "ldr Rn, [pc, #imm]" Thumb Mihai Popa2013-07-22
| | | | | | | | | | instructions. With this patch: 1. ldr.n is recognized as mnemonic for the short encoding 2. ldr.w is recognized as menmonic for the long encoding 3. ldr will map to either short or long encodings depending on the size of the offset git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186831 91177308-0d34-0410-b5e6-96231b3b80d8
* Replace archive members in the old position.Rafael Espindola2013-07-22
| | | | | | | | | | | | This matches gnu archive behavior and since archive member order can change which member is used, not changing the order on replacement looks like the right thing to do. This patch also refactors the logic for which archive member to keep and whether to move it to a helper function (computeInsertAction). The nesting in computeNewArchiveMembers was getting a bit confusing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186829 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't depend on a llvm-ar specific behavior.Rafael Espindola2013-07-22
| | | | | | | | GNU ar when not given the a or b modifiers replaces archive members in the same location of the old ones. I am about to implement that in llvm-ar. For now, just don't depend on the current llvm-ar behavior on this test. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186823 91177308-0d34-0410-b5e6-96231b3b80d8
* [NVPTX] Use approximate FP ops when unsafe-fp-math is used, and appendJustin Holewinski2013-07-22
| | | | | | .ftz to instructions if the nvptx-f32ftz attribute is set to "true" git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186820 91177308-0d34-0410-b5e6-96231b3b80d8
* Treat nothrow forms of ::operator delete and ::operator delete[] asRichard Smith2013-07-21
| | | | | | | deallocation functions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186798 91177308-0d34-0410-b5e6-96231b3b80d8
* Handle replacement into a position past the original member.Rafael Espindola2013-07-21
| | | | | | | We were incorrectly computing where to insert a member if it was replacing a previous member that was before the insert point. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186792 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't crash when llvm.compiler.used becomes empty.Rafael Espindola2013-07-20
| | | | | | | | GlobalOpt simplifies llvm.compiler.used by removing any members that are also in the more strict llvm.used. Handle the special case where llvm.compiler.used becomes empty. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186778 91177308-0d34-0410-b5e6-96231b3b80d8
* Disallow global aliases to bitcast between address spacesMatt Arsenault2013-07-20
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186767 91177308-0d34-0410-b5e6-96231b3b80d8
* InstCombine: call FoldOpIntoSelect for all floating binops, not just fmulStephen Lin2013-07-20
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186759 91177308-0d34-0410-b5e6-96231b3b80d8
* Have InlineCost check constant fcmpsMatt Arsenault2013-07-20
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186758 91177308-0d34-0410-b5e6-96231b3b80d8
* Refactor AnalyzeBranch on ARM. The previous version did not always analyzeLang Hames2013-07-19
| | | | | | | | | | | | | | | | | | | | indirect branches correctly. Under some circumstances, this led to the deletion of basic blocks that were the destination of indirect branches. In that case it left indirect branches to nowhere in the code. This patch replaces, and is more general than either of the previous fixes for indirect-branch-analysis issues, r181161 and r186461. For other branches (not indirect) this refactor should have *almost* identical behavior to the previous version. There are some corner cases where this refactor is able to analyze blocks that the previous version could not (e.g. this necessitated the update to thumb2-ifcvt2.ll). <rdar://problem/14464830> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186735 91177308-0d34-0410-b5e6-96231b3b80d8
* Retry submitting r186623: COFFDumper: Dump data directory entries.Rui Ueyama2013-07-19
| | | | | | | | The original change was rolled back in r186627 because of test failures on the big endian machine. I believe I fixed the issue so re-submitting. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186734 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Don't emit empty then clause and use alu_pop_afterVincent Lejeune2013-07-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186725 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix inserting new elements in a specified location.Rafael Espindola2013-07-19
| | | | | | We were only handling the 'a' and 'b' options during moves before. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186721 91177308-0d34-0410-b5e6-96231b3b80d8
* s/compiler_used/compiler.used/.Rafael Espindola2013-07-19
| | | | | | | We were incorrectly using compiler_used instead of compiler.used. Unfortunately the passes using the broken name had tests also using the broken name. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186705 91177308-0d34-0410-b5e6-96231b3b80d8
* [SystemZ] Add tests for ALHSIK and ALGHSIKRichard Sandiford2013-07-19
| | | | | | | | The insn definitions themselves crept into r186689, sorry. This should be the last of the distinct-ops instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186690 91177308-0d34-0410-b5e6-96231b3b80d8
* [SystemZ] Add ALRK, AGLRK, SLRK and SGLRKRichard Sandiford2013-07-19
| | | | | | | | Follows the same lines as r186686, but much more limited, since we only use ADD LOGICAL for multi-i64 additions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186689 91177308-0d34-0410-b5e6-96231b3b80d8
* [ARMv8] Implement the NEON instructions VRINT{N, X, A, Z, M, P}.Joey Gouly2013-07-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186688 91177308-0d34-0410-b5e6-96231b3b80d8
* [SystemZ] Add AHIK and AGHIKRichard Sandiford2013-07-19
| | | | | | | | I did these as a separate patch because it uses a slightly different form of RIE layout. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186687 91177308-0d34-0410-b5e6-96231b3b80d8
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