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* Teach TailRecursionElimination to handle certain cases of nocapture escaping ↵Michael Gottesman2013-07-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | allocas. Without the changes introduced into this patch, if TRE saw any allocas at all, TRE would not perform TRE *or* mark callsites with the tail marker. Because TRE runs after mem2reg, this inadequacy is not a death sentence. But given a callsite A without escaping alloca argument, A may not be able to have the tail marker placed on it due to a separate callsite B having a write-back parameter passed in via an argument with the nocapture attribute. Assume that B is the only other callsite besides A and B only has nocapture escaping alloca arguments (*NOTE* B may have other arguments that are not passed allocas). In this case not marking A with the tail marker is unnecessarily conservative since: 1. By assumption A has no escaping alloca arguments itself so it can not access the caller's stack via its arguments. 2. Since all of B's escaping alloca arguments are passed as parameters with the nocapture attribute, we know that B does not stash said escaping allocas in a manner that outlives B itself and thus could be accessed indirectly by A. With the changes introduced by this patch: 1. If we see any escaping allocas passed as a capturing argument, we do nothing and bail early. 2. If we do not see any escaping allocas passed as captured arguments but we do see escaping allocas passed as nocapture arguments: i. We do not perform TRE to avoid PR962 since the code generator produces significantly worse code for the dynamic allocas that would be created by the TRE algorithm. ii. If we do not return twice, mark call sites without escaping allocas with the tail marker. *NOTE* This excludes functions with escaping nocapture allocas. 3. If we do not see any escaping allocas at all (whether captured or not): i. If we do not have usage of setjmp, mark all callsites with the tail marker. ii. If there are no dynamic/variable sized allocas in the function, attempt to perform TRE on all callsites in the function. Based off of a patch by Nick Lewycky. rdar://14324281. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186057 91177308-0d34-0410-b5e6-96231b3b80d8
* Move r186044 tests into CodeGen/X86Hal Finkel2013-07-11
| | | | | | | | I had thought that these tests could be target-neutral, but in practice this is not the case (on some targets, like Hexagon and Darwin), they trigger an assert (a different assert than the one that r186044 fixes). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186051 91177308-0d34-0410-b5e6-96231b3b80d8
* Set REQUIRES shell on the test cases for r186044Hal Finkel2013-07-10
| | | | | | Trying to fix the i686-mingw32 build. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186046 91177308-0d34-0410-b5e6-96231b3b80d8
* XFAIL the test cases for r186044 on HexagonHal Finkel2013-07-10
| | | | | | | For some reason, the Hexagon backend does not reject these invalid static initializer expressions, but instead crashes in AsmPrinter::EmitGlobalConstant. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186045 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't assert if we can't constant fold extract/insertvalueHal Finkel2013-07-10
| | | | | | | | | | | | | | | A non-constant-foldable static initializer expression containing insertvalue or extractvalue had been causing an assert: Constants.cpp:1971: Assertion `FC && "ExtractValue constant expr couldn't be folded!"' failed. Now we report a more-sensible "Unsupported expression in static initializer" error instead. Fixes PR15417. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186044 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove this test for now.Rafael Espindola2013-07-10
| | | | | | | It is not reliable to depend on the output of llvm_unreachable. The original change will have proper tests when llvm-ar moves to lib/Object (soon). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186043 91177308-0d34-0410-b5e6-96231b3b80d8
* Find the symbol table on archives created on OS X.Rafael Espindola2013-07-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186041 91177308-0d34-0410-b5e6-96231b3b80d8
* Move tests from test/Archive to test/Object.Rafael Espindola2013-07-10
| | | | | | | | There is no lib/Archive anymore and some archive tests were in test/Archive and others in test/Object. Since archive is just one of the formats supported by lib/Object, test/Object is probably the best location. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186038 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a comment.Adrian Prantl2013-07-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186035 91177308-0d34-0410-b5e6-96231b3b80d8
* Put ELF COMDAT relocations into the relevant COMDAT group.Tim Northover2013-07-10
| | | | | | | | Patch from Игорь Пашев (I do hope we support utf-8 commit messages; I also hope he'll forgive me for transliterating it as Igor Pashev in case things go horribly wrong). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186034 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a testcase for r186014.Adrian Prantl2013-07-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186031 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't crash in 'llvm -s' when an archive has no symtab.Rafael Espindola2013-07-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186029 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix %t typo in Ocaml bindings test.Reid Kleckner2013-07-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186027 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: Initial local memory supportMichel Danzer2013-07-10
| | | | | | | | Enough for the radeonsi driver to use it for calculating derivatives. Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186012 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: Add intrinsic for retrieving the current thread IDMichel Danzer2013-07-10
| | | | | | Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186010 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: Add intrinsics for texture sampling with user derivativesMichel Danzer2013-07-10
| | | | | | Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186008 91177308-0d34-0410-b5e6-96231b3b80d8
* Reverting commit r185999 due to buildboot failure.Vladimir Medic2013-07-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186001 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for Mips break and syscall insructions. The corresponding test ↵Vladimir Medic2013-07-10
| | | | | | cases are added. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185999 91177308-0d34-0410-b5e6-96231b3b80d8
* Un-break the buildbot by tweaking the indirection flag.Adrian Prantl2013-07-10
| | | | | | Pulled in a testcase from the debuginfo-test suite. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185993 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: Fix incorrect pack pattern for thumb2Jim Grosbach2013-07-09
| | | | | | | | | | | | | | | Propagate the fix from r185712 to Thumb2 codegen as well. Original commit message applies here as well: A "pkhtb x, x, y asr #num" uses the lower 16 bits of "y asr #num" and packs them in the bottom half of "x". An arithmetic and logic shift are only equivalent in this context if the shift amount is 16. We would be shifting in ones into the bottom 16bits instead of zeros if "y" is negative. rdar://14338767 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185982 91177308-0d34-0410-b5e6-96231b3b80d8
* InstSimplify: X >> X -> 0David Majnemer2013-07-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185973 91177308-0d34-0410-b5e6-96231b3b80d8
* move test into the appropriate subdir.Adrian Prantl2013-07-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185972 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PR16571, which is a bug in the code that checks that all of the types in ↵Nadav Rotem2013-07-09
| | | | | | the bundle are uniform. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185970 91177308-0d34-0410-b5e6-96231b3b80d8
* Reapply an improved version of r180816/180817.Adrian Prantl2013-07-09
| | | | | | | | | | | | | | | Change the informal convention of DBG_VALUE machine instructions so that we can express a register-indirect address with an offset of 0. The old convention was that a DBG_VALUE is a register-indirect value if the offset (operand 1) is nonzero. The new convention is that a DBG_VALUE is register-indirect if the first operand is a register and the second operand is an immediate. For plain register values the combination reg, reg is used. MachineInstrBuilder::BuildMI knows how to build the new DBG_VALUES. rdar://problem/13658587 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185966 91177308-0d34-0410-b5e6-96231b3b80d8
* Appease buildbots after r185956: just set -mcpu explicitly, as it should ↵Stephen Lin2013-07-09
| | | | | | have been from the beginning. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185962 91177308-0d34-0410-b5e6-96231b3b80d8
* Appease Atom buildbot after r185956 (explicitly turn on AVX)Stephen Lin2013-07-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185961 91177308-0d34-0410-b5e6-96231b3b80d8
* WidenVecRes_BUILD_VECTOR must use the first operand's typeHal Finkel2013-07-09
| | | | | | | | | | | Because integer BUILD_VECTOR operands may have a larger type than the result's vector element type, and all operands must have the same type, when widening a BUILD_VECTOR node by adding UNDEFs, we cannot use the vector element type, but rather must use the type of the existing operands. Another bug found by llvm-stress. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185960 91177308-0d34-0410-b5e6-96231b3b80d8
* [PowerPC] Better fix for PR16556.Bill Schmidt2013-07-09
| | | | | | | | | | | | | | | | | | A more complete example of the bug in PR16556 was recently provided, showing that the previous fix was not sufficient. The previous fix is reverted herein. The real problem is that ReplaceNodeResults() uses LowerFP_TO_INT as custom lowering for FP_TO_SINT during type legalization, without checking whether the input type is handled by that routine. LowerFP_TO_INT requires the input to be f32 or f64, so we fail when the input is ppcf128. I'm leaving the test case from the initial fix (r185821) in place, and adding the new test as another crash-only check. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185959 91177308-0d34-0410-b5e6-96231b3b80d8
* Attempt to appease buildbot after r185956 by explicitly turning setting ↵Stephen Lin2013-07-09
| | | | | | -fma,-fma4 attrs (I'm assuming they're set because the bot is running on machine that has one or the other.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185958 91177308-0d34-0410-b5e6-96231b3b80d8
* AArch64/PowerPC/SystemZ/X86: This patch fixes the interface, usage, and allStephen Lin2013-07-09
| | | | | | | | | | | | | | | | | | | | | | | | in-tree implementations of TargetLoweringBase::isFMAFasterThanMulAndAdd in order to resolve the following issues with fmuladd (i.e. optional FMA) intrinsics: 1. On X86(-64) targets, ISD::FMA nodes are formed when lowering fmuladd intrinsics even if the subtarget does not support FMA instructions, leading to laughably bad code generation in some situations. 2. On AArch64 targets, ISD::FMA nodes are formed for operations on fp128, resulting in a call to a software fp128 FMA implementation. 3. On PowerPC targets, FMAs are not generated from fmuladd intrinsics on types like v2f32, v8f32, v4f64, etc., even though they promote, split, scalarize, etc. to types that support hardware FMAs. The function has also been slightly renamed for consistency and to force a merge/build conflict for any out-of-tree target implementing it. To resolve, see comments and fixed in-tree examples. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185956 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't crash in SE dealing with ashr x, -1Hal Finkel2013-07-09
| | | | | | | | | | | | | | ScalarEvolution::getSignedRange uses ComputeNumSignBits from ValueTracking on ashr instructions. ComputeNumSignBits can return zero, but this case was not handled correctly by the code in getSignedRange which was calling: APInt::getSignedMinValue(BitWidth).ashr(NS - 1) with NS = 0, resulting in an assertion failure in APInt::ashr. Now, we just return the conservative result (as with NS == 1). Another bug found by llvm-stress. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185955 91177308-0d34-0410-b5e6-96231b3b80d8
* ValueTracking: Fix bugs in isKnownToBeAPowerOfTwoDavid Majnemer2013-07-09
| | | | | | | | (add nsw x, (and x, y)) isn't a power of two if x is zero, it's zero (add nsw x, (xor x, y)) isn't a power of two if y has bits set that aren't set in x git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185954 91177308-0d34-0410-b5e6-96231b3b80d8
* DAGCombine tryFoldToZero cannot create illegal types after type legalizationHal Finkel2013-07-09
| | | | | | | | | | | When folding sub x, x (and other similar constructs), where x is a vector, the result is a vector of zeros. After type legalization, make sure that the input zero elements have a legal type. This type may be larger than the result's vector element type. This was another bug found by llvm-stress. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185949 91177308-0d34-0410-b5e6-96231b3b80d8
* [PowerPC] Revert r185476 and fix up TLS variant kindsUlrich Weigand2013-07-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the commit message to r185476 I wrote: >The PowerPC-specific modifiers VK_PPC_TLSGD and VK_PPC_TLSLD >correspond exactly to the generic modifiers VK_TLSGD and VK_TLSLD. >This causes some confusion with the asm parser, since VK_PPC_TLSGD >is output as @tlsgd, which is then read back in as VK_TLSGD. > >To avoid this confusion, this patch removes the PowerPC-specific >modifiers and uses the generic modifiers throughout. (The only >drawback is that the generic modifiers are printed in upper case >while the usual convention on PowerPC is to use lower-case modifiers. >But this is just a cosmetic issue.) This was unfortunately incorrect, there is is fact another, serious drawback to using the default VK_TLSLD/VK_TLSGD variant kinds: using these causes ELFObjectWriter::RelocNeedsGOT to return true, which in turn causes the ELFObjectWriter to emit an undefined reference to _GLOBAL_OFFSET_TABLE_. This is a problem on powerpc64, because it uses the TOC instead of the GOT, and the linker does not provide _GLOBAL_OFFSET_TABLE_, so the symbol remains undefined. This means shared libraries using TLS built with the integrated assembler are currently broken. While the whole RelocNeedsGOT / _GLOBAL_OFFSET_TABLE_ situation probably ought to be properly fixed at some point, for now I'm simply reverting the r185476 commit. Now this in turn exposes the breakage of handling @tlsgd/@tlsld in the asm parser that this check-in was originally intended to fix. To avoid this regression, I'm also adding a different fix for this problem: while common code now parses @tlsgd as VK_TLSGD, a special hack in the asm parser translates this code to the platform-specific VK_PPC_TLSGD that the back-end now expects. While this is not really pretty, it's self-contained and shouldn't hurt anything else for now. One the underlying problem is fixed, this hack can be reverted again. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185945 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Do not predicated basic block with multiple alu clauseVincent Lejeune2013-07-09
| | | | | | | | | | Test is not included as it is several 1000 lines long. To test this functionnality, a test case must generate at least 2 ALU clauses, where an ALU clause is ~110 instructions long. NOTE: This is a candidate for the stable branch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185943 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Fix a rare bug where swizzle optimization returns wrong valuesVincent Lejeune2013-07-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185942 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Fix wrong export reswizzlingVincent Lejeune2013-07-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185941 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Use DAG lowering pass to handle fcos/fsinVincent Lejeune2013-07-09
| | | | | | NOTE: This is a candidate for the stable branch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185940 91177308-0d34-0410-b5e6-96231b3b80d8
* Add MC assembly/disassembly support for VRINT{A, N, P, M} to V8FP.Joey Gouly2013-07-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185929 91177308-0d34-0410-b5e6-96231b3b80d8
* Add MC assembly/disassembly support for VRINT{Z, X, R} to V8FP.Joey Gouly2013-07-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185926 91177308-0d34-0410-b5e6-96231b3b80d8
* [PowerPC] Support ".machine any"Ulrich Weigand2013-07-09
| | | | | | | | | | | | | | The PowerPC assembler is supposed to provide a directive .machine that allows switching the supported CPU instruction set on the fly. Since we do not yet check CPU feature sets at all and always accept any available instruction, this is not really useful at this point. However, it makes sense to accept (and ignore) ".machine any" to avoid spuriously rejecting existing assembler files that use this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185924 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r185872 - "Stop emitting weak symbols into the "coal" sections"Alexander Potapenko2013-07-09
| | | | | | | | | | | | | | This patch broke `make check-asan` on Mac, causing ld warnings like the following one: ld: warning: direct access in __GLOBAL__I_a to global weak symbol ___asan_mapping_scale means the weak symbol cannot be overridden at runtime. This was likely caused by different translation units being compiled with different visibility settings. The resulting test binaries crashed with incorrect ASan warnings. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185923 91177308-0d34-0410-b5e6-96231b3b80d8
* Add MC assembly/disassembly support for VCVT{A, N, P, M} to V8FP.Joey Gouly2013-07-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185922 91177308-0d34-0410-b5e6-96231b3b80d8
* [SystemZ] Use MVC for simple load/store pairsRichard Sandiford2013-07-09
| | | | | | | | | | | | | Look for patterns of the form (store (load ...), ...) in which the two locations are known not to partially overlap. (Identical locations are OK.) These sequences are better implemented by MVC unless either the load or the store could use RELATIVE LONG instructions. The testcase showed that we weren't using LHRL and LGHRL for extload16, only sextloadi16. The patch fixes that too. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185919 91177308-0d34-0410-b5e6-96231b3b80d8
* [SystemZ] Use "STC;MVC" for memsetRichard Sandiford2013-07-09
| | | | | | | | | | | | | Use "STC;MVC" for memsets that are too big for two STCs or MV...Is yet small enough for a single MVC. As with memcpy, I'm leaving longer cases till later. The number of tests might seem excessive, but f33 & f34 from memset-04.ll failed the first cut because I'd not added the "?:" on the calculation of Size1. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185918 91177308-0d34-0410-b5e6-96231b3b80d8
* InstCombine: variations on 0xffffffff - x >= 4David Majnemer2013-07-09
| | | | | | | | | | | The following transforms are valid if -C is a power of 2: (icmp ugt (xor X, C), ~C) -> (icmp ult X, C) (icmp ult (xor X, C), -C) -> (icmp uge X, C) These are nice, they get rid of the xor. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185915 91177308-0d34-0410-b5e6-96231b3b80d8
* InstCombine: X & -C != -C -> X <= u ~CDavid Majnemer2013-07-09
| | | | | | | Tests were added in r185910 somehow. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185912 91177308-0d34-0410-b5e6-96231b3b80d8
* [PowerPC] Support .llong and fix .wordUlrich Weigand2013-07-09
| | | | | | | | | | This adds support for the .llong PowerPC-specifc assembler directive. In doing so, I notices that .word is currently incorrect: it is supposed to define a 2-byte data element, not a 4-byte one. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185911 91177308-0d34-0410-b5e6-96231b3b80d8
* Commit r185909 was a misapplied patch, fix itDavid Majnemer2013-07-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185910 91177308-0d34-0410-b5e6-96231b3b80d8
* InstCombine: add more transformsDavid Majnemer2013-07-09
| | | | | | | | | | C1-X <u C2 -> (X|(C2-1)) == C1 C1-X >u C2 -> (X|C2) == C1 X-C1 <u C2 -> (X & -C2) == C1 X-C1 >u C2 -> (X & ~C2) == C1 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185909 91177308-0d34-0410-b5e6-96231b3b80d8
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