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utils
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TableGen
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EDEmitter.cpp
Commit message (
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Author
Age
*
Remove exception handling usage from tblgen.
Joerg Sonnenberger
2012-10-25
*
Fix a couple of Doxygen comment issues pointed out by -Wdocumentation.
Dmitri Gribenko
2012-09-12
*
Make x86 asm parser to check for xmm vs ymm for index register in gather inst...
Craig Topper
2012-07-18
*
X86: add GATHER intrinsics (AVX2) in LLVM
Manman Ren
2012-06-26
*
Write llvm-tblgen backends as functions instead of sub-classes.
Jakob Stoklund Olesen
2012-06-11
*
Fixed decoding for the ARM cdp2 instruction. The restriction on the coprocess...
Silviu Baranga
2012-04-18
*
Add support for AVX enhanced comparison predicates. Patch from Kay Tiong Khoo.
Craig Topper
2012-04-03
*
Spill DPair registers, not just QPR.
Jakob Stoklund Olesen
2012-03-28
*
ARM more NEON VLD/VST composite physical register refactoring.
Jim Grosbach
2012-03-06
*
ARM refactor more NEON VLD/VST instructions to use composite physregs
Jim Grosbach
2012-03-06
*
ARM Refactor VLD/VST spaced pair instructions.
Jim Grosbach
2012-03-05
*
ARM refactor away a bunch of VLD/VST pseudo instructions.
Jim Grosbach
2012-03-05
*
Add X86 assembler and disassembler support for AMD SVM instructions. Original...
Craig Topper
2012-02-18
*
Make the EDis tables const.
Benjamin Kramer
2012-02-11
*
ARM VFP assembly parsing and encoding for VCVT(float <--> fixed point).
Jim Grosbach
2011-12-22
*
ARM NEON VLD2 assembly parsing for structure to all lanes, non-writeback.
Jim Grosbach
2011-12-21
*
ARM: NEON SHLL instruction immediate operand range checking.
Jim Grosbach
2011-12-07
*
ARM NEON VEXT aliases for data type suffices.
Jim Grosbach
2011-12-02
*
ARM parsing for VLD1 two register all lanes, no writeback.
Jim Grosbach
2011-11-30
*
llvm_unreachable() is not for user diagnostics....
Jim Grosbach
2011-11-30
*
ARM parsing aliases for VLD1 single register all lanes.
Jim Grosbach
2011-11-30
*
Add vmov.f32 to materialize f32 immediate splats which cannot be handled by
Evan Cheng
2011-11-15
*
Assembly parsing for 2-register sequential variant of VLD2.
Jim Grosbach
2011-10-21
*
Assembly parsing for 4-register variant of VLD1.
Jim Grosbach
2011-10-21
*
Assembly parsing for 3-register variant of VLD1.
Jim Grosbach
2011-10-21
*
ARM VLD parsing and encoding.
Jim Grosbach
2011-10-21
*
ARM VTBL (one register) assembly parsing and encoding.
Jim Grosbach
2011-10-18
*
ARM assembly parsing and encoding for VMOV.i64.
Jim Grosbach
2011-10-18
*
ARM assembly parsing and encoding for VMOV/VMVN/VORR/VBIC.i32.
Jim Grosbach
2011-10-18
*
ARM assembly parsing and encoding for VMOV/VMVN/VORR/VBIC.i16.
Jim Grosbach
2011-10-17
*
ARM NEON "vmov.i8" immediate assembly parsing and encoding.
Jim Grosbach
2011-10-17
*
ARM parsing and encoding for the <option> form of LDC/STC instructions.
Jim Grosbach
2011-10-12
*
Emit full ED initializers even for pseudo-instructions.
Jakob Stoklund Olesen
2011-10-10
*
Insert dummy ED table entries for pseudo-instructions.
Jakob Stoklund Olesen
2011-10-10
*
ARM NEON assembly parsing and encoding for VDUP(scalar).
Jim Grosbach
2011-10-07
*
Fix assembling of xchg %eax, %eax to not use the NOP encoding of 0x90. This w...
Craig Topper
2011-10-06
*
Move TableGen's parser and entry point into a library
Peter Collingbourne
2011-10-01
*
ASR #32 is not allowed on Thumb2 USAT and SSAT instructions.
Owen Anderson
2011-09-26
*
Thumb2 assembly parsing and encoding for TBB/TBH.
Jim Grosbach
2011-09-19
*
Thumb2 assembly parsing and encoding for LDREX/LDREXB/LDREXD/LDREXH.
Jim Grosbach
2011-09-09
*
Thumb2 assembly parsing and encoding for LDRBT.
Jim Grosbach
2011-09-07
*
Thumb2 parsing and encoding for LDR(immediate).
Jim Grosbach
2011-09-07
*
Improve encoding support for BLX with immediat eoperands, and fix a BLX decod...
Owen Anderson
2011-08-26
*
Thumb parsing and encoding support for ADD SP instructions.
Jim Grosbach
2011-08-24
*
Thumb1 ADD/SUB SP instructions are predicable in Thumb2 mode.
Jim Grosbach
2011-08-24
*
Create a new register class for the set of all GPRs except the PC. Use it to...
Owen Anderson
2011-08-09
*
Fix encodings for Thumb ASR and LSR immediate operands. They encode the rang...
Owen Anderson
2011-08-08
*
LDCL_POST and STCL_POST need one's-complement offsets, rather than two's comp...
Owen Anderson
2011-08-04
*
ARM refactoring assembly parsing of memory address operands.
Jim Grosbach
2011-08-03
*
ARM: rename addrmode7 to addr_offset_none.
Jim Grosbach
2011-08-02
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