| Commit message (Expand) | Author | Age |
|---|
| * | ASR #32 is not allowed on Thumb2 USAT and SSAT instructions. | Owen Anderson | 2011-09-26 |
| * | Thumb2 assembly parsing and encoding for TBB/TBH. | Jim Grosbach | 2011-09-19 |
| * | Thumb2 assembly parsing and encoding for LDREX/LDREXB/LDREXD/LDREXH. | Jim Grosbach | 2011-09-09 |
| * | Thumb2 assembly parsing and encoding for LDRBT. | Jim Grosbach | 2011-09-07 |
| * | Thumb2 parsing and encoding for LDR(immediate). | Jim Grosbach | 2011-09-07 |
| * | Improve encoding support for BLX with immediat eoperands, and fix a BLX decod... | Owen Anderson | 2011-08-26 |
| * | Thumb parsing and encoding support for ADD SP instructions. | Jim Grosbach | 2011-08-24 |
| * | Thumb1 ADD/SUB SP instructions are predicable in Thumb2 mode. | Jim Grosbach | 2011-08-24 |
| * | Create a new register class for the set of all GPRs except the PC. Use it to... | Owen Anderson | 2011-08-09 |
| * | Fix encodings for Thumb ASR and LSR immediate operands. They encode the rang... | Owen Anderson | 2011-08-08 |
| * | LDCL_POST and STCL_POST need one's-complement offsets, rather than two's comp... | Owen Anderson | 2011-08-04 |
| * | ARM refactoring assembly parsing of memory address operands. | Jim Grosbach | 2011-08-03 |
| * | ARM: rename addrmode7 to addr_offset_none. | Jim Grosbach | 2011-08-02 |
| * | Fix llvm-mc handing of x86 instructions that take 8-bit unsigned immediates. | Kevin Enderby | 2011-07-27 |
| * | Split am2offset into register addend and immediate addend forms, necessary fo... | Owen Anderson | 2011-07-26 |
| * | ARM parsing and encoding for SVC instruction. | Jim Grosbach | 2011-07-26 |
| * | ARM assembly parsing and encoding for SSAT16 instruction. | Jim Grosbach | 2011-07-25 |
| * | ARM SSAT instruction 5-bit immediate handling. | Jim Grosbach | 2011-07-22 |
| * | Get rid of the extraneous GPR operand on so_reg_imm operands, which in turn n... | Owen Anderson | 2011-07-21 |
| * | Split up the ARM so_reg ComplexPattern into so_reg_reg and so_reg_imm, allowi... | Owen Anderson | 2011-07-21 |
| * | ARM PKH shift ammount operand printing tweaks. | Jim Grosbach | 2011-07-20 |
| * | ARM assembly parsing for MOV (immediate). | Jim Grosbach | 2011-07-19 |
| * | Range checking for CDP[2] immediates. | Jim Grosbach | 2011-07-13 |
| * | Give the ARM BKPT instruction the right operand type. | Jim Grosbach | 2011-07-13 |
| * | Resynchronize EDInfo.h and EDEmitter.cpp. | Shantonu Sen | 2011-07-11 |
| * | Don't require pseudo-instructions to carry encoding information. | Jim Grosbach | 2011-07-06 |
| * | ARM Assembly support for Thumb mov-immediate. | Jim Grosbach | 2011-06-27 |
| * | Fix ssat and ssat16 encodings for ARM and Thumb. The bit position value | Bruno Cardoso Lopes | 2011-05-31 |
| * | Fixed MC encoding for index_align for VLD1/VST1 (single element from one lane... | Mon P Wang | 2011-05-09 |
| * | Remove unused STL header includes. | Jay Foad | 2011-04-23 |
| * | Add asm parsing support w/ testcases for strex/ldrex family of instructions | Bruno Cardoso Lopes | 2011-03-24 |
| * | Thumb2 PC-relative loads require a fixup rather than just an immediate. | Owen Anderson | 2011-03-18 |
| * | Rename the narrow shift right immediate operands to "shr_imm*" operands. Also | Bill Wendling | 2011-03-07 |
| * | Narrow right shifts need to encode their immediates differently from a normal | Bill Wendling | 2011-03-01 |
| * | Fix encoding and add parsing support for the arm/thumb CPS instruction: | Bruno Cardoso Lopes | 2011-02-14 |
| * | Teach ARM/MC/ELF to handle R_ARM_JUMP24 relocation type for conditional jumps. | Jason W Kim | 2011-02-04 |
| * | TableGen: PointerLikeRegClass can be accepted to operand. | NAKAMURA Takumi | 2011-01-26 |
| * | Add support for parsing and encoding ARM's official syntax for the BFI instru... | Bruno Cardoso Lopes | 2011-01-18 |
| * | Add support to the ARM MC infrastructure to support mcr and friends. This req... | Owen Anderson | 2011-01-13 |
| * | Model :upper16: and :lower16: as ARM specific MCTargetExpr. This is a step | Evan Cheng | 2011-01-13 |
| * | Add support for MC-ized encoding of tLEApcrel and tLEApcrelJT. rdar://8755755 | Jim Grosbach | 2010-12-14 |
| * | The tLDR et al instructions were emitting either a reg/reg or reg/imm | Bill Wendling | 2010-12-14 |
| * | Second attempt at make Thumb2 LEAs pseudos. This time, perform the lowering ... | Owen Anderson | 2010-12-14 |
| * | Revert r121721, which broke buildbots. | Owen Anderson | 2010-12-13 |
| * | Make Thumb2 LEA-like instruction into pseudos, which map down to ADR. Provid... | Owen Anderson | 2010-12-13 |
| * | In Thumb2, direct branches can be encoded as either a "short" conditional bra... | Owen Anderson | 2010-12-13 |
| * | eliminate the Records global variable, patch by Garrison Venn! | Chris Lattner | 2010-12-13 |
| * | Thumb unconditional branch binary encoding. rdar://8754994 | Jim Grosbach | 2010-12-10 |
| * | Thumb conditional branch binary encodings. rdar://8745367 | Jim Grosbach | 2010-12-10 |
| * | Thumb needs a few different encoding schemes for branch targets. Rename | Jim Grosbach | 2010-12-09 |
