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* Support BufferSize on ProcResGroup for unified MOp schedulers.Andrew Trick2013-06-15
| | | | | | And add Sandybridge/Haswell resource buffers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184034 91177308-0d34-0410-b5e6-96231b3b80d8
* Machine Model: Add MicroOpBufferSize and resource BufferSize.Andrew Trick2013-06-15
| | | | | | | | | | | | | Replace the ill-defined MinLatency and ILPWindow properties with with straightforward buffer sizes: MCSchedMode::MicroOpBufferSize MCProcResourceDesc::BufferSize These can be used to more precisely model instruction execution if desired. Disabled some misched tests temporarily. They'll be reenabled in a few commits. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184032 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't use PathV1.h in FileUtilities.h.Rafael Espindola2013-06-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183941 91177308-0d34-0410-b5e6-96231b3b80d8
* Avoid using PathV1.h in Program.h.Rafael Espindola2013-06-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183940 91177308-0d34-0410-b5e6-96231b3b80d8
* Have sys::FindProgramByName return a std::string.Rafael Espindola2013-06-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183928 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove the program class.Rafael Espindola2013-06-12
| | | | | | | It was only used to implement ExecuteAndWait and ExecuteNoWait. Expose just those two functions and make Execute and Wait implementations details. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183864 91177308-0d34-0410-b5e6-96231b3b80d8
* tblgen: Assert that InstRWs doesn't grows when we don't expect it.Benjamin Kramer2013-06-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183690 91177308-0d34-0410-b5e6-96231b3b80d8
* tblgen: always lookup values from the original vector as it could be grown ↵Benjamin Kramer2013-06-09
| | | | | | | | under our feet. PR16281. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183630 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a script to help us create source tar balls for the release.Bill Wendling2013-06-07
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183509 91177308-0d34-0410-b5e6-96231b3b80d8
* Use proper exit code.Bill Wendling2013-06-07
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183508 91177308-0d34-0410-b5e6-96231b3b80d8
* CodeGenSchedule: Use resize instead of copying a vectorArnold Schwaighofer2013-06-07
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183465 91177308-0d34-0410-b5e6-96231b3b80d8
* CodeGenSchedule: smallvector.push_back(smallvector[0]) is dangerousArnold Schwaighofer2013-06-06
| | | | | | | | | | The element passed to push_back is not copied before the vector reallocates. The client needs to copy the element first before passing it to push_back. No test case, will be tested by follow-up swift scheduler model change (it segfaults without this change). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183459 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unimplemented definition. Found using [-Wunused-member-function].Jakub Staszak2013-06-06
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183426 91177308-0d34-0410-b5e6-96231b3b80d8
* SubtargetEmitter fixArnold Schwaighofer2013-06-05
| | | | | | | | | Don't output data if we are supposed to ignore the record. Reapply of 183255, I don't think this was causing the tablegen segfault on linux testers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183311 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a tblgen subtargetemitter bug, for future Swift support.Andrew Trick2013-06-05
| | | | | | | | | | This fixes some of the ridiculously complex code for optimizing the machine model tables that are shared among all processors of a given target. A9 and Swift both use the "special" feature that maps old itinerary classes to new machine model defs. They map different overlapping subsets of instructions, which wasn't handled correctly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183302 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert series of sched model patches until I figure out what is going on.Arnold Schwaighofer2013-06-04
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183273 91177308-0d34-0410-b5e6-96231b3b80d8
* SubtargetEmitter fixArnold Schwaighofer2013-06-04
| | | | | | Don't output data if we are supposed to ignore the record. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183255 91177308-0d34-0410-b5e6-96231b3b80d8
* Make SubRegIndex size mandatory, following r183020.Ahmed Bougacha2013-05-31
| | | | | | | | This also makes TableGen able to compute sizes/offsets of synthesized indices representing tuples. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183061 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a way to define the bit range covered by a SubRegIndex.Ahmed Bougacha2013-05-31
| | | | | | | | | | | | | | | NOTE: If this broke your out-of-tree backend, in *RegisterInfo.td, change the instances of SubRegIndex that have a comps template arg to use the ComposedSubRegIndex class instead. In TableGen land, this adds Size and Offset attributes to SubRegIndex, and the ComposedSubRegIndex class, for which the Size and Offset are computed by TableGen. This also adds an accessor in MCRegisterInfo, and Size/Offsets for the X86 and ARM subreg indices. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183020 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixed bug when tests in executable partially used absolute paths.Galina Kistanova2013-05-30
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182910 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove the MCRegAliasIterator tables and compute the aliases dynamically.Chad Rosier2013-05-28
| | | | | | | | | | | | | | | | | | | | | The size reduction in the RegDiffLists are rather dramatic. Here are a few size differences for MCTargetDesc.o files (before and after) in bytes: R600 - 36160B - 11184B - 69% reduction ARM - 28480B - 8368B - 71% reduction Mips - 816B - 576B - 29% reduction One side effect of dynamically computing the aliases is that the iterator does not guarantee that the entries are ordered or that duplicates have been removed. The documentation implies this is a safe assumption and I found no clients that requires these attributes (i.e., strict ordering and uniqueness). My local LNT tester results showed no execution-time failures or significant compile-time regressions (i.e., beyond what I would consider noise) for -O0g, -O2 and -O3 runs on x86_64 and i386 configurations. rdar://12906217 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182783 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r182715 and r182758Alexey Samsonov2013-05-28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182761 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixup for r182715: provide correct arg to --gtest-filterAlexey Samsonov2013-05-28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182758 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixed bug when tests in executable partially used absolute paths.Galina Kistanova2013-05-26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182715 91177308-0d34-0410-b5e6-96231b3b80d8
* Recognize ValueType operands in source patterns for fast-isel.Bill Schmidt2013-05-22
| | | | | | | | | | | | | | | | | | | | | | Currently the fast-isel table generator recognizes registers, register classes, and immediates for source pattern operands. ValueType operands are not recognized. This is not a problem for existing targets with fast-isel support, but will not work for targets like PowerPC and SPARC that use types in source patterns. The proposed patch allows ValueType operands and treats them in the same manner as register classes. There is no convenient way to map from a ValueType to a register class, but there's no need to do so. The table generator already requires that all types in the source pattern be identical, and we know the register class of the output operand already. So we just assign that register class to any ValueType operands we encounter. No functional effect on existing targets. Testing deferred until the PowerPC target implements fast-isel. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182512 91177308-0d34-0410-b5e6-96231b3b80d8
* Add TargetRegisterInfo::getCoveringLanes().Jakob Stoklund Olesen2013-05-16
| | | | | | | | This lane mask provides information about which register lanes completely cover super-registers. See the block comment before getCoveringLanes(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182034 91177308-0d34-0410-b5e6-96231b3b80d8
* Use proper syntax.Bill Wendling2013-05-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181930 91177308-0d34-0410-b5e6-96231b3b80d8
* Add lldb and polly to the projects to tag.Bill Wendling2013-05-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181925 91177308-0d34-0410-b5e6-96231b3b80d8
* Add 'CHECK-DAG' supportMichael Liao2013-05-14
| | | | | | | | Refer to 'FileCheck.rst'f for details of 'CHECK-DAG'. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181827 91177308-0d34-0410-b5e6-96231b3b80d8
* Refactor string checking. No functionality change.Michael Liao2013-05-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181824 91177308-0d34-0410-b5e6-96231b3b80d8
* Get the unittests compiling when building with cmake and the settingDuncan Sands2013-05-14
| | | | | | | -DLLVM_ENABLE_THREADS=false. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181788 91177308-0d34-0410-b5e6-96231b3b80d8
* Add libcxx and clang-tools-extra to the testing thing.Bill Wendling2013-05-08
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181418 91177308-0d34-0410-b5e6-96231b3b80d8
* Add clang-tools-extra to the list of things to tag for the release.Bill Wendling2013-05-08
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181402 91177308-0d34-0410-b5e6-96231b3b80d8
* Add the libc++ project to those we tag.Bill Wendling2013-05-07
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181371 91177308-0d34-0410-b5e6-96231b3b80d8
* Try to fix ProgramTest on FreeBSDReid Kleckner2013-04-30
| | | | | | | This seemed like the cleanest way to find the test executable. Also fix the file mode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180770 91177308-0d34-0410-b5e6-96231b3b80d8
* Handle tied sub-operands in AsmMatcherEmitterUlrich Weigand2013-04-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The problem this patch addresses is the handling of register tie constraints in AsmMatcherEmitter, where one operand is tied to a sub-operand of another operand. The typical scenario for this to happen is the tie between the "write-back" register of a pre-inc instruction, and the base register sub-operand of the memory address operand of that instruction. The current AsmMatcherEmitter code attempts to handle tied operands by emitting the operand as usual first, and emitting a CVT_Tied node when handling the second (tied) operand. However, this really only works correctly if the tied operand does not have sub-operands (and isn't a sub-operand itself). Under those circumstances, a wrong MC operand list is generated. In discussions with Jim Grosbach, it turned out that the MC operand list really ought not to contain tied operands in the first place; instead, it ought to consist of exactly those operands that are named in the AsmString. However, getting there requires significant rework of (some) targets. This patch fixes the immediate problem, and at the same time makes one (small) step in the direction of the long-term solution, by implementing two changes: 1. Restricts the AsmMatcherEmitter handling of tied operands to apply solely to simple operands (not complex operands or sub-operand of such). This means that at least we don't get silently corrupt MC operand lists as output. However, if we do have tied sub-operands, they would now no longer be handled at all, except for: 2. If we have an operand that does not occur in the AsmString, and also isn't handled as tied operand, simply emit a dummy MC operand (constant 0). This works as long as target code never attempts to access MC operands that do no not occur in the AsmString (and are not tied simple operands), which happens to be the case for all targets where this situation can occur (ARM and PowerPC). [ Note that this change means that many of the ARM custom converters are now superfluous, since the implement the same "hack" now performed already by common code. ] Longer term, we ought to fix targets to never access *any* MC operand that does not occur in the AsmString (including tied simple operands), and then finally completely remove all such operands from the MC operand list. Patch approved by Jim Grosbach. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180677 91177308-0d34-0410-b5e6-96231b3b80d8
* Use 'git svn find-rev' in git-svnrevert instead of shell script fu.Michael Gottesman2013-04-26
| | | | | | Thanks Chandler! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180592 91177308-0d34-0410-b5e6-96231b3b80d8
* Added the scripts git-svnup/git-svnrevert to utils/git-svn.Michael Gottesman2013-04-26
| | | | | | | | | | | | | | | | | | | | | | | | | It makes more sense to have git-svnup here than catting said file in the documentation (where we should rather point users to this directory). I included git-svnrevert as an additional gift to the community. I will update the documentation in a second commit later today. git-svnrevert takes in a git hash for a commit, looks up the svn revision for said commit and then creates the normal git revert commit message with the one liner message, except instead of saying Revert "<<<INSERT ONELINER HERE>>>" This reverts commit <<<INSERT GITHASH HERE>>> It says: Revert "<<<INSERT ONELINER HERE>>>" This reverts commit r<<<INSERT SVN REVISION HERE>>> so git hashes will not escape into our svn logs (which just look unseemly). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180587 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove SMLoc paired with CHECK-NOT patterns. Not functionality change.Michael Liao2013-04-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Pattern has source location by itself. After adding a trivial method to retrieve it, it's unnecessary to pair a source location for CHECK-NOT patterns. One thing revised after this is the diagnostic info is more accurate by pointing to the start of the CHECK-NOT pattern instead of the end of the CHECK-NOT pattern. E.g. diagnostic message previously looks like <stdin>:1:1: error: CHECK-NOT: string occurred! test ^ test.txt:1:16: note: CHECK-NOT: pattern specified here CHECK-NOT: test ^ is changed to <stdin>:1:1: error: CHECK-NOT: string occurred! test ^ test.txt:1:12: note: CHECK-NOT: pattern specified here CHECK-NOT: test ^ git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180578 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove tailing whitespacesMichael Liao2013-04-25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180564 91177308-0d34-0410-b5e6-96231b3b80d8
* Machine model: Generate table entries for super-resources.Andrew Trick2013-04-23
| | | | | | | | | Super-resources and resource groups are two ways of expressing overlapping sets of processor resources. Now we generate table entries the same way for both so the scheduler never needs to explicitly check for super-resources. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180162 91177308-0d34-0410-b5e6-96231b3b80d8
* Machine model: verify well-formed processor resource groups.Andrew Trick2013-04-23
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180161 91177308-0d34-0410-b5e6-96231b3b80d8
* Machine model: rewrite a tablegen loop to avoid comparing record pointers.Andrew Trick2013-04-23
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180160 91177308-0d34-0410-b5e6-96231b3b80d8
* [asm parser] Add support for predicating MnemonicAlias based on the assemblerChad Rosier2013-04-18
| | | | | | | | | variant/dialect. Addresses a FIXME in the emitMnemonicAliases function. Use and test case to come shortly. rdar://13688439 and part of PR13340. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179804 91177308-0d34-0410-b5e6-96231b3b80d8
* lit: Fix infinite recursion when an out-of-tree test root is located inside ↵Daniel Dunbar2013-04-12
| | | | | | the source test root. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179402 91177308-0d34-0410-b5e6-96231b3b80d8
* lit: Add a test for discovery w/ test_exec_root (out-of-tree test root).Daniel Dunbar2013-04-12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179401 91177308-0d34-0410-b5e6-96231b3b80d8
* Add CLAC/STAC instruction encoding/decoding supportMichael Liao2013-04-11
| | | | | | | | | As these two instructions in AVX extension are privileged instructions for special purpose, it's only expected to be used in inlined assembly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179266 91177308-0d34-0410-b5e6-96231b3b80d8
* lit: Don't descend into .git directories during test discovery.Daniel Dunbar2013-04-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179249 91177308-0d34-0410-b5e6-96231b3b80d8
* lit: Shorten a metavar to make --help look nicer.Daniel Dunbar2013-04-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179248 91177308-0d34-0410-b5e6-96231b3b80d8
* lit: Add a test for discovery when exact test names are given.Daniel Dunbar2013-04-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179247 91177308-0d34-0410-b5e6-96231b3b80d8
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