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authorZoran Jovanovic <zoran.jovanovic@imgtec.com>2014-02-28 18:22:56 +0000
committerZoran Jovanovic <zoran.jovanovic@imgtec.com>2014-02-28 18:22:56 +0000
commit2a80d7db79f9ed8744101eb8a47a86aa482f7c52 (patch)
treed7567234b043a027fce4c5e81f5d6baf399d3a3c /test/CodeGen
parent0164f27742eee258409466b1a3a63bec222e84d2 (diff)
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Fixed operand of SC microMIPS instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202526 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
-rw-r--r--test/CodeGen/Mips/micromips-atomic.ll18
1 files changed, 18 insertions, 0 deletions
diff --git a/test/CodeGen/Mips/micromips-atomic.ll b/test/CodeGen/Mips/micromips-atomic.ll
new file mode 100644
index 0000000000..a50e0b7850
--- /dev/null
+++ b/test/CodeGen/Mips/micromips-atomic.ll
@@ -0,0 +1,18 @@
+; RUN: llc %s -march=mipsel -mcpu=mips32r2 -mattr=micromips -filetype=asm \
+; RUN: -relocation-model=pic -o - | FileCheck %s
+
+@x = common global i32 0, align 4
+
+define i32 @AtomicLoadAdd32(i32 %incr) nounwind {
+entry:
+ %0 = atomicrmw add i32* @x, i32 %incr monotonic
+ ret i32 %0
+
+; CHECK-LABEL: AtomicLoadAdd32:
+; CHECK: lw $[[R0:[0-9]+]], %got(x)
+; CHECK: $[[BB0:[A-Z_0-9]+]]:
+; CHECK: ll $[[R1:[0-9]+]], 0($[[R0]])
+; CHECK: addu $[[R2:[0-9]+]], $[[R1]], $4
+; CHECK: sc $[[R2]], 0($[[R0]])
+; CHECK: beqz $[[R2]], $[[BB0]]
+}