| Commit message (Expand) | Author | Age |
|---|
| * | Speculatively revert commit 127478 (jsjodin) in an attempt to fix the | Duncan Sands | 2011-03-12 |
| * | This patch removes some of useless instructions generated by bitfield access. | Jin-Gu Kang | 2011-03-12 |
| * | Include snippets in the live stack interval. | Jakob Stoklund Olesen | 2011-03-12 |
| * | Spill multiple registers at once. | Jakob Stoklund Olesen | 2011-03-12 |
| * | Fixed the comparison operator for the enhanced | Sean Callanan | 2011-03-12 |
| * | That's it, I am declaring this a failure of the C++03 STL. | Jakob Stoklund Olesen | 2011-03-12 |
| * | Saving files before committing is overrated. | Eric Christopher | 2011-03-12 |
| * | Sometimes isPredicable lies to us and tells us we don't need the operands. | Eric Christopher | 2011-03-12 |
| * | Remove no-longer-correct special case for disasm of ARM BL instructions. | Jim Grosbach | 2011-03-12 |
| * | Add FIXME. | Jim Grosbach | 2011-03-12 |
| * | Pseudo-ize the ARM Darwin *r9 call instruction definitions. They're the same | Jim Grosbach | 2011-03-12 |
| * | Add a FIXME. | Jim Grosbach | 2011-03-11 |
| * | Pseudo-ize the ARM 'B' instruction. | Jim Grosbach | 2011-03-11 |
| * | Remove dead code. These ARM instruction definitions no longer exist. | Jim Grosbach | 2011-03-11 |
| * | Remove dead code. These ARM instruction definitions no longer exist. | Jim Grosbach | 2011-03-11 |
| * | Pseudo-ize VMOVDcc and VMOVScc. | Jim Grosbach | 2011-03-11 |
| * | 80 columns | Jim Grosbach | 2011-03-11 |
| * | Properly pseudo-ize the ARM LDMIA_RET instruction. This has the nice side- | Jim Grosbach | 2011-03-11 |
| * | Roll r127459 back in: | Cameron Zwarich | 2011-03-11 |
| * | Fix the GCC test suite issue exposed by r127477, which was caused by stack | Cameron Zwarich | 2011-03-11 |
| * | Teach FastISel to support register-immediate-immediate instructions. | Owen Anderson | 2011-03-11 |
| * | 80 columns. | Jim Grosbach | 2011-03-11 |
| * | Trailing whitespace. | Jim Grosbach | 2011-03-11 |
| * | Remove dead code. These ARM instruction definitions don't exist. | Jim Grosbach | 2011-03-11 |
| * | ARM VDUPfd and VDUPfq can just be patterns. The instruction is the same | Jim Grosbach | 2011-03-11 |
| * | Remove dead code. These ARM instruction definitions don't exist. | Jim Grosbach | 2011-03-11 |
| * | ARM VDUPLNfq and VDUPLNfd definitions can just be Pat<>s for VDUPLN32q | Jim Grosbach | 2011-03-11 |
| * | ARM VREV64df and VREV64qf can just be patterns. The instruction is the same | Jim Grosbach | 2011-03-11 |
| * | This FIXME has been fixed. | Jim Grosbach | 2011-03-11 |
| * | Properly pseudo-ize ARM MVNCCi. | Jim Grosbach | 2011-03-11 |
| * | Add missing 'return on failure'. Previously we'd crash after emitting | Jim Grosbach | 2011-03-11 |
| * | Remove optimization emitting a reference insted of label difference, since it... | Jan Sjödin | 2011-03-11 |
| * | Revert r127459, "Optimize trivial branches in CodeGenPrepare, which often get | Daniel Dunbar | 2011-03-11 |
| * | Force re-linking of LLVMgold.so when its exports file changes. | Oscar Fuentes | 2011-03-11 |
| * | Fix processing of gold.exports. | Oscar Fuentes | 2011-03-11 |
| * | While printing annotations, print line number and variable name if debug info... | Devang Patel | 2011-03-11 |
| * | Fix MOVCCi32imm to be have ARM-mode Requires and a proper size (8 bytes, was 4). | Jim Grosbach | 2011-03-11 |
| * | Replace -dag-chain-limit flag with constant. It has survived a release cycle ... | Andrew Trick | 2011-03-11 |
| * | Add LTO and gold plugin to the CMake build. Linux-only, support for | Oscar Fuentes | 2011-03-11 |
| * | ComputeMaskedBits: sub falls through to add, and sub doesn't have the same ov... | Benjamin Kramer | 2011-03-11 |
| * | InstCombine: Fix a thinko where transform an icmp under the assumption that i... | Benjamin Kramer | 2011-03-11 |
| * | Teach ComputeMaskedBits about nsw on add. I don't think there's anything we can | Nick Lewycky | 2011-03-11 |
| * | Fix use of CompEnd predicate to be standards conforming | John Wiegley | 2011-03-11 |
| * | Optimize trivial branches in CodeGenPrepare, which often get created from the | Cameron Zwarich | 2011-03-11 |
| * | Teach TableGen to pre-calculate register enum values when creating the | Jim Grosbach | 2011-03-11 |
| * | silence a conditional assignment -Wuninitialized warning. | Chris Lattner | 2011-03-11 |
| * | Make the register enum value part of the CodeGenRegister struct. | Jim Grosbach | 2011-03-11 |
| * | Trailing whitespace. | Jim Grosbach | 2011-03-11 |
| * | Trailing whitespace. | Jim Grosbach | 2011-03-11 |
| * | Tidy up since ARM MOVCCi and MOVCCi16 are now pseudos. | Jim Grosbach | 2011-03-11 |
