summaryrefslogtreecommitdiff
path: root/lib/Target
Commit message (Expand)AuthorAge
* Add a new subtarget hook for whether or not we'd like to enableEric Christopher2014-06-19
* Fix typosAlp Toker2014-06-19
* [mips] Implementation of dli.Matheus Almeida2014-06-19
* [mips] Small update to the logic behind the expansion of assembly pseudo inst...Matheus Almeida2014-06-19
* [X86] Teach how to combine horizontal binop even in the presence of undefs.Andrea Di Biagio2014-06-19
* Convert some assert(0) to llvm_unreachable or fold an 'if' condition into the...Craig Topper2014-06-19
* MS asm: Properly handle quoted symbol namesDavid Majnemer2014-06-19
* R600/SI: Add intrinsics for various math instructions.Matt Arsenault2014-06-19
* Move ARMJITInfo off of the TargetMachine and down onto the subtarget.Eric Christopher2014-06-18
* Use stdint macros for specifying size of constantsMatt Arsenault2014-06-18
* R600: Handle fnearbyintMatt Arsenault2014-06-18
* R600/SI: add gather4 and getlod intrinsics (v3)Marek Olsak2014-06-18
* Use LL suffix for literal that should be 64-bits.Matt Arsenault2014-06-18
* [PowerPC] Remove unnecessary load of r12 in indirect callUlrich Weigand2014-06-18
* [ARM] [MC] Refactor the constant pool classesWeiming Zhao2014-06-18
* R600: Expand vector fceilJan Vesely2014-06-18
* [PowerPC] Simplify and improve loading into TOC registerUlrich Weigand2014-06-18
* Work around ridiculous warning.Matt Arsenault2014-06-18
* R600/SI: Add intrinsics for brev instructionsMatt Arsenault2014-06-18
* R600/SI: Prettier operand printing for 64-bit ops.Matt Arsenault2014-06-18
* [mips] SYNC $stype instruction was added in Mips32Matheus Almeida2014-06-18
* R600: Implement f64 ftrunc, ffloor and fceil.Matt Arsenault2014-06-18
* R600: Custom lower f64 frint for pre-CIMatt Arsenault2014-06-18
* R600/SI: Temporary fix for f64 fnegMatt Arsenault2014-06-18
* R600/SI: Comparisons set vcc.Matt Arsenault2014-06-18
* [X86] AVX512: Add non-temporal storesAdam Nemet2014-06-18
* [X86] AVX512: Specify compressed displacement for vmovntdqaAdam Nemet2014-06-18
* [PowerPC] Do not use BLA with the 64-bit SVR4 ABIUlrich Weigand2014-06-18
* [PowerPC] Fix emitting instruction pairs on LEUlrich Weigand2014-06-18
* [mips] Fix expansion of memory operation if destination register is not a GPR.Matheus Almeida2014-06-18
* [mips] Report correct location when "erroring" about the use of $at when it's...Matheus Almeida2014-06-18
* [mips][mips64r6] Add BLTC and BLTUC instructionsZoran Jovanovic2014-06-18
* [mips] Access $at only if necessary.Matheus Almeida2014-06-18
* Add pattern for unsigned v4i32->v4f64 convert on AVX512.Cameron McInally2014-06-18
* [mips] Update MipsAsmParser so that it's possible to handle immediates that s...Matheus Almeida2014-06-18
* [mips] Implement alias for 'and' and 'or' instructions for all ISAs.Matheus Almeida2014-06-18
* [mips] Remove the last usage of parseRegister from MipsAsmParser.Matheus Almeida2014-06-18
* R600: Implement 64bit SRAJan Vesely2014-06-18
* R600: Implement 64bit SRLJan Vesely2014-06-18
* R600: Implement 64bit SHLJan Vesely2014-06-18
* [AArch64] Fix a pattern match failure caused by creating improper CONCAT_VECTOR.Kevin Qin2014-06-18
* Replace some assert(0)'s with llvm_unreachable.Craig Topper2014-06-18
* Allow X86FastIsel to cope with 64 bit absolute relocationsLouis Gerbarg2014-06-17
* [FastISel][X86] Optimize predicates and fold CMP instructions.Juergen Ributzka2014-06-17
* R600/SI: Make sure target flags are set on pseudo VOP3 instructionsTom Stellard2014-06-17
* R600/SI: Match cttz_zero_undefMatt Arsenault2014-06-17
* R600/SI: Match ctlz_zero_undefMatt Arsenault2014-06-17
* R600: Use LDS and vectors for private memoryTom Stellard2014-06-17
* R600/SI: Add a pattern for llvm.AMDGPU.barrier.globalTom Stellard2014-06-17
* SelectionDAG: Expand i64 = FP_TO_SINT i32Tom Stellard2014-06-17