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* Revert r206565 (and r206566 which updated tests).Chandler Carruth2014-04-18
* Updated test with register names following r206565.Yaron Keren2014-04-18
* ARM64: [su]xtw use W regs as inputs, not X regs.Jim Grosbach2014-04-17
* [X86] Add disassembler support for the 0x0f 0x7f form of movq %mm, %mm.Craig Topper2014-04-17
* Test commit - Added a new lineKonrad Anheim2014-04-16
* [mips] Use TwoOperandAliasConstraint for shift instructions.Matheus Almeida2014-04-16
* [mips] Add initial support for NaN2008 in the back-end.Matheus Almeida2014-04-16
* AArch64/ARM64: produce correct relocation for conditional branches.Tim Northover2014-04-16
* COFF: fix an off by one errorSaleem Abdulrasool2014-04-16
* COFF: add support for .file symbolsSaleem Abdulrasool2014-04-16
* AArch64/ARM64: only mangle MOVZ/MOVN during encoding when neededTim Northover2014-04-15
* Optional hash symbol feature support for ARM64Stepan Dyatkovskiy2014-04-15
* [MC] Emit an error if cfi_startproc is used before a symbol is defined.Quentin Colombet2014-04-15
* Fix up MCFixup::getAccessVariant to handle unary expressions.Kaelyn Takata2014-04-14
* Don't lose the thumb bit by using relocations with sections.Rafael Espindola2014-04-11
* Revert: r205182 - llvm/test/MC/Mips/mips64r2/valid-xfail.s: This REQUIRES ass...Daniel Sanders2014-04-11
* Remove the use of "%e" as it is not a valid expansion like "%t".Kaelyn Takata2014-04-10
* Reimplement debug info compression by compressing the whole section, rather t...David Blaikie2014-04-10
* Revert debug info compression support.David Blaikie2014-04-10
* For the ARM integrated assembler add checking of theKevin Enderby2014-04-10
* [mips] Switch the MIPS-III and MIPS-IV assembler tests to use -mcpu=mips4.Daniel Sanders2014-04-10
* Revert "For the ARM integrated assembler add checking of the alignments on vl...Reid Kleckner2014-04-10
* For the ARM integrated assembler add checking of theKevin Enderby2014-04-09
* Fix some doc and comment typosAlp Toker2014-04-09
* [ARM64] Change SYS without a register to an alias to make disassembling more ...Bradley Smith2014-04-09
* [ARM64] Correctly disassemble ISB operand as ISB not DBarrier.Bradley Smith2014-04-09
* [ARM64] Properly support both apple and standard syntax for FMOVBradley Smith2014-04-09
* [ARM64] Flag setting logical/add/sub immediate instructions don't use SP.Bradley Smith2014-04-09
* [ARM64] Conditional branches must always print their condition code, even AL.Bradley Smith2014-04-09
* [ARM64] Fix disassembly logic for extended loads/stores with 32-bit registers.Bradley Smith2014-04-09
* [ARM64] Add missing shifted register MVN alias to ORNBradley Smith2014-04-09
* [ARM64] SXTW/UXTW are only valid aliases for 32-bit operations.Bradley Smith2014-04-09
* [ARM64] Fix canonicalisation of MOVs. MOV is too complex to be modelled by a ...Bradley Smith2014-04-09
* [ARM64] Fixup ADR/ADRP parsing such that they accept immediates and all label...Bradley Smith2014-04-09
* [ARM64] Ensure sp is decoded as SP, not XZR in LD1 instructions.Bradley Smith2014-04-09
* [ARM64] Tighten up the special casing in emitting arithmetic extends. UXTW sh...Bradley Smith2014-04-09
* [ARM64] Rename LR to the UAL-compliant 'X30'.Bradley Smith2014-04-09
* [ARM64] Rename FP to the UAL-compliant 'X29'.Bradley Smith2014-04-09
* [ARM64] Add a PostEncoderMethod to FCMP - the Rm field should canonically be ...Bradley Smith2014-04-09
* [ARM64] SCVTF and FCVTZS/U are undefined if scale<5> == 0.Bradley Smith2014-04-09
* [ARM64] EXT and EXTR instructions on v8i8 and W regs respectively must have t...Bradley Smith2014-04-09
* [ARM64] UBFM/BFM is undefined on w registers when imms<5> or immr<5> is 1.Bradley Smith2014-04-09
* [ARM64] Floating point to fixed point scaled conversions are only available o...Bradley Smith2014-04-09
* [ARM64] Port over the PostEncoderMethod fix for SMULH/UMULH from AArch64.Bradley Smith2014-04-09
* [ARM64] Add missing tlbi operands and error for extra/missing register on tlb...Bradley Smith2014-04-09
* [ARM64] Rework system register parsing to overcome SPSel clash in MSR variants.Bradley Smith2014-04-09
* [ARM64] Port over the PostEncoderMethod from AArch64 for exclusive loads and ...Bradley Smith2014-04-09
* [ARM64] Add WZR to isGPR32Register, since every use needs to check for this a...Bradley Smith2014-04-09
* [ARM64] Move CPSRField and DBarrier operands over to AArch64-style disassembl...Bradley Smith2014-04-09
* [ARM64] Switch the decoder, disassembler, instprinter and asmparser over to u...Bradley Smith2014-04-09
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