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* Fix llvm-extract -delete's lazy loading to materialize the functions thatDan Gohman2010-09-23
| | | | | | | will not be deleted, rather than the ones that will. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114614 91177308-0d34-0410-b5e6-96231b3b80d8
* A select between a constant and zero, when fed by a bit test, can be efficientlyOwen Anderson2010-09-22
| | | | | | | | lowered using a series of shifts. Fixes <rdar://problem/8285015>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114599 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PR8201: Update the code to call via X86::CALL64pcrel32 in the 64-bit case.Cameron Esfahani2010-09-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114597 91177308-0d34-0410-b5e6-96231b3b80d8
* Avoid some Mach-O specific alignment being done on ELF.Rafael Espindola2010-09-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114594 91177308-0d34-0410-b5e6-96231b3b80d8
* Correctly align bss.Rafael Espindola2010-09-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114556 91177308-0d34-0410-b5e6-96231b3b80d8
* llvmc: Support '-emit-llvm -S' with -opt.Mikhail Glushenkov2010-09-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114541 91177308-0d34-0410-b5e6-96231b3b80d8
* fix rdar://8456371 - Handle commutable instructions written backward.Chris Lattner2010-09-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114536 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix an inconsistency in the x86 backend that led it to reject "calll foo" onChris Lattner2010-09-22
| | | | | | | | | | | | | x86-32: 32-bit calls were named "call" not "calll". 64-bit calls were correctly named "callq", so this only impacted x86-32. This fixes rdar://8456370 - llvm-mc rejects 'calll' This also exposes that mingw/64 is generating a 32-bit call instead of a 64-bit call, I will file a bugzilla. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114534 91177308-0d34-0410-b5e6-96231b3b80d8
* fix rdar://8456412 - llvm-mc crash in encoder on "mov %rdx, %cr8"Chris Lattner2010-09-22
| | | | | | | Teaching the code generator about CR8-15, how to rex them up, etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114533 91177308-0d34-0410-b5e6-96231b3b80d8
* fix rdar://8456417 - llvm-mc can't do basic mathChris Lattner2010-09-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114532 91177308-0d34-0410-b5e6-96231b3b80d8
* add the missing aliases for fp stack cmovs, rdar://8456391Chris Lattner2010-09-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114531 91177308-0d34-0410-b5e6-96231b3b80d8
* reimplement elf TLS support in terms of addressing modes, eliminating ↵Chris Lattner2010-09-22
| | | | | | SegmentBaseAddress. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114529 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix rdar://8456364 - llvm-mc rejects '%CS'Chris Lattner2010-09-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114528 91177308-0d34-0410-b5e6-96231b3b80d8
* fix rdar://8456389 - llvm-mc mismatch with 'as' on 'fstp'Chris Lattner2010-09-22
| | | | | | | | | | -This line, and those below, will be ignored-- M test/MC/AsmParser/X86/x86_instructions.s M lib/Target/X86/AsmParser/X86AsmParser.cpp git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114527 91177308-0d34-0410-b5e6-96231b3b80d8
* fix rdar://8456361 - llvm-mc rejects 'rep movsd'Chris Lattner2010-09-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114526 91177308-0d34-0410-b5e6-96231b3b80d8
* linux has a different stack alignment than the mac, relax this a bit.Chris Lattner2010-09-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114519 91177308-0d34-0410-b5e6-96231b3b80d8
* give VZEXT_LOAD a memory operand, it now works with segment registers.Chris Lattner2010-09-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114515 91177308-0d34-0410-b5e6-96231b3b80d8
* revert r114386 now that address modes work correctly, we get a niceChris Lattner2010-09-22
| | | | | | | call through gs-relative memory now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114510 91177308-0d34-0410-b5e6-96231b3b80d8
* give LCMPXCHG_DAG[8] a memory operand, allowing it to work with addrspace ↵Chris Lattner2010-09-21
| | | | | | 256/257 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114508 91177308-0d34-0410-b5e6-96231b3b80d8
* filecheckizeChris Lattner2010-09-21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114507 91177308-0d34-0410-b5e6-96231b3b80d8
* OptimizeCompareInstr should avoid iterating pass the beginning of the MBB ↵Evan Cheng2010-09-21
| | | | | | when the 'and' instruction is after the comparison. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114506 91177308-0d34-0410-b5e6-96231b3b80d8
* Enable target-specific mul-lowering on ARM, even at -Os. Remove a test that ↵Owen Anderson2010-09-21
| | | | | | | | | this makes irrelevant, but add a new test for the new, improved functionality. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114494 91177308-0d34-0410-b5e6-96231b3b80d8
* Use FileCheckDevang Patel2010-09-21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114475 91177308-0d34-0410-b5e6-96231b3b80d8
* When adding the carry bit to another value on X86, exploit the fact that the ↵Owen Anderson2010-09-21
| | | | | | | | | | | | carry-materialization (sbbl x, x) sets the registers to 0 or ~0. Combined with two's complement arithmetic, we can fold the intermediate AND and the ADD into a single SUB. This fixes <rdar://problem/8449754>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114460 91177308-0d34-0410-b5e6-96231b3b80d8
* llvmc: Allow multiple output languages.Mikhail Glushenkov2010-09-21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114433 91177308-0d34-0410-b5e6-96231b3b80d8
* fix rdar://8453210, a crash handling a call through a GS relative load.Chris Lattner2010-09-21
| | | | | | | For now, just disable folding the load into the call. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114386 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement support for .local and its "interesting" interactions with .comm.Rafael Espindola2010-09-21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114382 91177308-0d34-0410-b5e6-96231b3b80d8
* Enable machine sinking critical edge splitting. e.g.Evan Cheng2010-09-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | define double @foo(double %x, double %y, i1 %c) nounwind { %a = fdiv double %x, 3.2 %z = select i1 %c, double %a, double %y ret double %z } Was: _foo: divsd LCPI0_0(%rip), %xmm0 testb $1, %dil jne LBB0_2 movaps %xmm1, %xmm0 LBB0_2: ret Now: _foo: testb $1, %dil je LBB0_2 divsd LCPI0_0(%rip), %xmm0 ret LBB0_2: movaps %xmm1, %xmm0 ret This avoids the divsd when early exit is taken. rdar://8454886 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114372 91177308-0d34-0410-b5e6-96231b3b80d8
* CombinerAA is now reordering these stores.Owen Anderson2010-09-20
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114354 91177308-0d34-0410-b5e6-96231b3b80d8
* When TCO is turned on, it is possible to end up with aliasing FrameIndex's. ↵Owen Anderson2010-09-20
| | | | | | | | | | | | | Therefore, CombinerAA cannot assume that different FrameIndex's never alias, but can instead use MachineFrameInfo to get the actual offsets of these slots and check for actual aliasing. This fixes CodeGen/X86/2010-02-19-TailCallRetAddrBug.ll and CodeGen/X86/tailcallstack64.ll when CombinerAA is enabled, modulo a different register allocation sequence. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114348 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify ARM callee-saved register handling by removing the distinctionJim Grosbach2010-09-20
| | | | | | | | | | | | | | | | | | | | | between the high and low registers for prologue/epilogue code. This was a Darwin-only thing that wasn't providing a realistic benefit anymore. Combining the save areas simplifies the compiler code and results in better ARM/Thumb2 codegen. For example, previously we would generate code like: push {r4, r5, r6, r7, lr} add r7, sp, #12 stmdb sp!, {r8, r10, r11} With this change, we combine the register saves and generate: push {r4, r5, r6, r7, r8, r10, r11, lr} add r7, sp, #12 rdar://8445635 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114340 91177308-0d34-0410-b5e6-96231b3b80d8
* Produce a R_X86_64_32 when the value is >=0.Rafael Espindola2010-09-20
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114339 91177308-0d34-0410-b5e6-96231b3b80d8
* test/CodeGen/X86: Add explicit triplet -mtriple=i686-linux to 3 tests ↵NAKAMURA Takumi2010-09-19
| | | | | | | | incompatible to Win32 codegen. r114297 raises 3 failures. They might fail also on mingw. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114317 91177308-0d34-0410-b5e6-96231b3b80d8
* Add the exit instruction to the PTX target.Eric Christopher2010-09-18
| | | | | | | Patch by Che-Liang Chiou <clchiou@gmail.com>! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114294 91177308-0d34-0410-b5e6-96231b3b80d8
* Make sure the STT_FILE symbol is the first one in the symbol table.Rafael Espindola2010-09-18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114285 91177308-0d34-0410-b5e6-96231b3b80d8
* Invert the logic of reachesChainWithoutSideEffects(). What we want to check ↵Owen Anderson2010-09-18
| | | | | | | | | | | is that there is NO path to the destination containing side effects, not that SOME path contains no side effects. In practice, this only manifests with CombinerAA enabled, because otherwise the chain has little to no branching, so "any" is effectively equivalent to "all". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114268 91177308-0d34-0410-b5e6-96231b3b80d8
* Add test that was missing in my previous commit.Rafael Espindola2010-09-18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114248 91177308-0d34-0410-b5e6-96231b3b80d8
* Attempt to XFAIL this test on arm-linux, which is inexplicably failing.Dan Gohman2010-09-18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114241 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix vmov.f64 disassembly on targets where sizeof(long) != 8.Benjamin Kramer2010-09-17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114240 91177308-0d34-0410-b5e6-96231b3b80d8
* Add target-specific DAG combiner for BUILD_VECTOR and VMOVRRD. An i64Bob Wilson2010-09-17
| | | | | | | | | value should be in GPRs when it's going to be used as a scalar, and we use VMOVRRD to make that happen, but if the value is converted back to a vector we need to fold to a simple bit_convert. Radar 8407927. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114233 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach the (non-MC) instruction printer to use the cannonical names for push/pop,Jim Grosbach2010-09-17
| | | | | | and shift instructions on ARM. Update the tests to match. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114230 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach machine sink toEvan Cheng2010-09-17
| | | | | | | | | | | 1) Do forward copy propagation. This makes it easier to estimate the cost of the instruction being sunk. 2) Break critical edges on demand, including cases where the value is used by PHI nodes. Critical edge splitting is not yet enabled by default. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114227 91177308-0d34-0410-b5e6-96231b3b80d8
* Update tests to handle MC-inst instruction printing of shift operations. TheJim Grosbach2010-09-17
| | | | | | | | | | | legacy asm printer uses instructions of the form, "mov r0, r0, lsl #3", while the MC-instruction printer uses the form "lsl r0, r0, #3". The latter mnemonic is correct and preferred according the ARM documentation (A8.6.98). The former are pseudo-instructions for the latter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114221 91177308-0d34-0410-b5e6-96231b3b80d8
* FileCheck-izeJim Grosbach2010-09-17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114218 91177308-0d34-0410-b5e6-96231b3b80d8
* Move thumb2 tests to the thumb2 directoryJim Grosbach2010-09-17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114206 91177308-0d34-0410-b5e6-96231b3b80d8
* tweak test to check instructions rather than relying on the comment stringJim Grosbach2010-09-17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114204 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix this test to avoid an "inexact" fold.Dan Gohman2010-09-17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114202 91177308-0d34-0410-b5e6-96231b3b80d8
* Avoid emitting a PIC base register if no PIC addresses are needed.Dan Gohman2010-09-17
| | | | | | | This fixes rdar://8396318. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114201 91177308-0d34-0410-b5e6-96231b3b80d8
* tweak test to check instructions rather than relying on the comment stringJim Grosbach2010-09-17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114200 91177308-0d34-0410-b5e6-96231b3b80d8
* tweak test to check instructions rather than relying on the comment stringJim Grosbach2010-09-17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114199 91177308-0d34-0410-b5e6-96231b3b80d8
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