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* Add -alias and -ralias options to match what we have for functions andRafael Espindola2012-10-29
| | | | | | globals. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166909 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-extract changes linkages so that functions on both sides of theRafael Espindola2012-10-29
| | | | | | | split module can see each other. If it is keeping a symbol that already has a non local linkage, it doesn't need to change it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166908 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-extract was unable to handle aliases. It would leave a copy on theRafael Espindola2012-10-29
| | | | | | | | | | | | | | | | | | output of both llvm-extract foo.ll -func=bar and llvm-extract foo.ll -func=bar -delete so the two new files could not be linked together anymore. With this change alias are handled almost like functions and global variables. Almost because with alias we cannot just clear the initializer/body, we have to create a new declaration and replace the alias with it. The net result is that now the output of the above commands can be linked even if foo.ll has aliases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166907 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement brind operator for mips16.Reed Kotler2012-10-28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166903 91177308-0d34-0410-b5e6-96231b3b80d8
* This patch is for the implementation of mips16 complex pattern addr16.Reed Kotler2012-10-28
| | | | | | | | | | | | | | | | | | | | | | | Previously mips16 was sharing the pattern addr which is used for mips32 and mips64. This had a number of problems: 1) Storing and loading byte and halfword quantities for mips16 has particular problems due to the primarily non mips16 nature of SP. When we must load/store byte/halfword stack objects in a function, we must create a mips16 alias register for SP. This functionality is tested in stchar.ll. 2) We need to have an FP register under certain conditions (such as dynamically sized alloca). We use mips16 register S0 for this purpose. In this case, we also use this register when accessing frame objects so this issue also affects the complex pattern addr16. This functionality is tested in alloca16.ll. The Mips16InstrInfo.td has been updated to use addr16 instead of addr. The complex pattern C++ function for addr has been copied to addr16 and updated to reflect the above issues. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166897 91177308-0d34-0410-b5e6-96231b3b80d8
* Never attempt to join an early-clobber def with a regular kill.Jakob Stoklund Olesen2012-10-27
| | | | | | This fixes PR14194. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166880 91177308-0d34-0410-b5e6-96231b3b80d8
* LoopIdiom: Add checks to avoid turning memmove into an infinite loop.Benjamin Kramer2012-10-27
| | | | | | I don't think this is possible with the current implementation but that may change eventually. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166877 91177308-0d34-0410-b5e6-96231b3b80d8
* LoopIdiom: Recognize memmove loops.Benjamin Kramer2012-10-27
| | | | | | | | | | | This turns loops like for (unsigned i = 0; i != n; ++i) p[i] = p[i+1]; into memmove, which has a highly optimized implementation in most libcs. This was really easy with the new DependenceAnalysis :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166875 91177308-0d34-0410-b5e6-96231b3b80d8
* LoopIdiom: Replace custom dependence analysis with DependenceAnalysis.Benjamin Kramer2012-10-27
| | | | | | | | | | | Requires a lot less code and complexity on loop-idiom's side and the more precise analysis can catch more cases, like the one I included as a test case. This also fixes the edge-case miscompilation from PR9481. Compile time performance seems to be slightly worse, but this is mostly due to an extra LCSSA run scheduled by the PassManager and should be fixed there. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166874 91177308-0d34-0410-b5e6-96231b3b80d8
* 1. Fix a bug in getTypeConversion. When a *simple* type is split, we need to ↵Nadav Rotem2012-10-27
| | | | | | | | | | | return the type of the split result. 2. Change the maximum vectorization width from 4 to 8. 3. A test for both. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166864 91177308-0d34-0410-b5e6-96231b3b80d8
* [code size][ARM] Emit regular call instructions instead of the move, branch ↵Quentin Colombet2012-10-27
| | | | | | sequence git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166854 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement MipsHi for mips16Reed Kotler2012-10-27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166852 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Do not tail-call optimize vararg functions or functions with byvalAkira Hatanaka2012-10-27
| | | | | | | | | | arguments. This is rather conservative and should be fixed later to be more aggressive. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166851 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Make sure FuncArg doesn't advance when OrigArgIndex is the same as in theAkira Hatanaka2012-10-27
| | | | | | | | previous iteration. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166850 91177308-0d34-0410-b5e6-96231b3b80d8
* Refactor the VectorTargetTransformInfo interface.Nadav Rotem2012-10-26
| | | | | | | | | | | | Add getCostXXX calls for different families of opcodes, such as casts, arithmetic, cmp, etc. Port the LoopVectorizer to the new API. The LoopVectorizer now finds instructions which will remain uniform after vectorization. It uses this information when calculating the cost of these instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166836 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r163298 "Optimize codegen for VSETLNi{8,16,32} operating on Q registers."Jakob Stoklund Olesen2012-10-26
| | | | | | | Keep the integer_insertelement test case, the new coalescer can handle this kind of lane insertion without help from pseudo-instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166835 91177308-0d34-0410-b5e6-96231b3b80d8
* implement mips16 tls global addrReed Kotler2012-10-26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166827 91177308-0d34-0410-b5e6-96231b3b80d8
* Add GPRPair Register class to ARM.Jakob Stoklund Olesen2012-10-26
| | | | | | | | | Some instructions in ARM require 2 even-odd paired GPRs. This patch adds support for such register class. Patch by Weiming Zhao! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166816 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove LoopDependenceAnalysis.Benjamin Kramer2012-10-26
| | | | | | | It was unmaintained and not much more than a stub. The new DependenceAnalysis pass is both more general and complete. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166810 91177308-0d34-0410-b5e6-96231b3b80d8
* Move target-specific BBVectorize tests into a separate directory.Hal Finkel2012-10-26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166802 91177308-0d34-0410-b5e6-96231b3b80d8
* Move the target-specific tests, which require specific backends, to dirs ↵Nadav Rotem2012-10-26
| | | | | | that only run if the target is present. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166796 91177308-0d34-0410-b5e6-96231b3b80d8
* Change the internalize pass to internalize all symbols when given an emptyRafael Espindola2012-10-26
| | | | | | | list of externals. This makes sense since a shared library with no symbols can still be useful if it has static constructors. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166795 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix SCEV cache invalidation in LCSSA and LoopSimplify.Benjamin Kramer2012-10-26
| | | | | | | | | | | | | | The LoopSimplify bug is pretty harmless because the loop goes from unanalyzable to analyzable but the LCSSA bug is very nasty. It only comes into play with a specific order of the LoopPassManager worklist and can cause actual miscompilations, when a SCEV refers to a value that has been replaced with PHI node. SCEVExpander may then insert code into the wrong place, either violating domination or randomly miscompiling stuff. Comes with an extensive test case reduced from the test-suite with bugpoint+SCEVValidator. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166787 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a crash in SimpliftDemandedBits of vectors of pointers.Nadav Rotem2012-10-26
| | | | | | | | PR14183. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166785 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement carry for subtract/add for mips16Reed Kotler2012-10-26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166755 91177308-0d34-0410-b5e6-96231b3b80d8
* implement large (>16 bit) constant loading.Reed Kotler2012-10-26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166749 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix unexpected passes. These test do work with LTO on linux. I tested bothRafael Espindola2012-10-26
| | | | | | a cmake and an autoconf build. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166748 91177308-0d34-0410-b5e6-96231b3b80d8
* fix test setgek.ll so that it will not give false "make check" Reed Kotler2012-10-26
| | | | | | | failure in some cases git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166747 91177308-0d34-0410-b5e6-96231b3b80d8
* Port testcase to FileCheck.Rafael Espindola2012-10-26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166742 91177308-0d34-0410-b5e6-96231b3b80d8
* Disable generation of pointer vectors by BBVectorize.Hal Finkel2012-10-26
| | | | | | Once vector-of-pointer support works, then this can be reverted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166741 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert 166726 because it may have broken a number of SPEC tests. PR14183.Nadav Rotem2012-10-25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166739 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a crash in ValueTracking. Add support for vectors of pointers.Nadav Rotem2012-10-25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166726 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the cost-model test.Nadav Rotem2012-10-25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166722 91177308-0d34-0410-b5e6-96231b3b80d8
* implement mips16 patterns for select nodesReed Kotler2012-10-25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166721 91177308-0d34-0410-b5e6-96231b3b80d8
* Add CPU model to BBVectorize cost-model tests.Hal Finkel2012-10-25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166720 91177308-0d34-0410-b5e6-96231b3b80d8
* Add the cpu model to the test.Nadav Rotem2012-10-25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166718 91177308-0d34-0410-b5e6-96231b3b80d8
* Begin incorporating target information into BBVectorize.Hal Finkel2012-10-25
| | | | | | | | | | | | | | | | | | | | | | | | This is the first of several steps to incorporate information from the new TargetTransformInfo infrastructure into BBVectorize. Two things are done here: 1. Target information is used to determine if it is profitable to fuse two instructions. This means that the cost of the vector operation must not be more expensive than the cost of the two original operations. Pairs that are not profitable are no longer considered (because current cost information is incomplete, for intrinsics for example, equal-cost pairs are still considered). 2. The 'cost savings' computed for the profitability check are also used to rank the DAGs that represent the potential vectorization plans. Specifically, for nodes of non-trivial depth, the cost savings is used as the node weight. The next step will be to incorporate the shuffle costs into the DAG weighting; this will give the edges of the DAG weights as well. Once that is done, when target information is available, we should be able to dispense with the depth heuristic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166716 91177308-0d34-0410-b5e6-96231b3b80d8
* Also optimize large switch statements.Jakob Stoklund Olesen2012-10-25
| | | | | | | | | | The isValueEqualityComparison() guard at the top of SimplifySwitch() only applies to some of the possible transformations. The newer transformations work just fine on large switches, and the check on predecessor count is nonsensical. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166710 91177308-0d34-0410-b5e6-96231b3b80d8
* Add test for ATOM ISA SSSE3Michael Liao2012-10-25
| | | | | | | | - Remove SSE4.1 feature in other ATOM-based test cases git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166699 91177308-0d34-0410-b5e6-96231b3b80d8
* This patch addresses a PPC64 ELF issue with passing parameters consisting ofBill Schmidt2012-10-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | structs having size 3, 5, 6, or 7. Such a struct must be passed and received as right-justified within its register or memory slot. The problem is only present for structs that are passed in registers. Previously, as part of a patch handling all structs of size less than 8, I added logic to rotate the incoming register so that the struct was left- justified prior to storing the whole register. This was incorrect because the address of the parameter had already been adjusted earlier to point to the right-adjusted value in the storage slot. Essentially I had accidentally accounted for the right-adjustment twice. In this patch, I removed the incorrect logic and reorganized the code to make the flow clearer. The removal of the rotates changes the expected code generation, so test case structsinregs.ll has been modified to reflect this. I also added a new test case, jaggedstructs.ll, to demonstrate that structs of these sizes can now be properly received and passed. I've built and tested the code on powerpc64-unknown-linux-gnu with no new regressions. I also ran the GCC compatibility test suite and verified that earlier problems with these structs are now resolved, with no new regressions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166680 91177308-0d34-0410-b5e6-96231b3b80d8
* Initial TOC support for PowerPC64 object creationAdhemerval Zanella2012-10-25
| | | | | | | | | | | | | | | | This patch adds initial PPC64 TOC MC object creation using the small mcmodel (a single 64K TOC) adding the some TOC relocations (R_PPC64_TOC, R_PPC64_TOC16, and R_PPC64_TOC16DS). The addition of 'undefinedExplicitRelSym' hook on 'MCELFObjectTargetWriter' is meant to avoid the creation of an unreferenced ".TOC." symbol (used in the .odp creation) as well to set the R_PPC64_TOC relocation target as the temporary ".TOC." symbol. On PPC64 ABI, the R_PPC64_TOC relocation should not point to any symbol. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166677 91177308-0d34-0410-b5e6-96231b3b80d8
* The test avx-intel-ocl.ll failed. I can't reproduce on any of my machines. I ↵Elena Demikhovsky2012-10-25
| | | | | | added -mcpu flag, may be it will fix the problem git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166669 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach SROA how to split whole-alloca integer loads and stores intoChandler Carruth2012-10-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | smaller integer loads and stores. The high-level motivation is that the frontend sometimes generates a single whole-alloca integer load or store during ABI lowering of splittable allocas. We need to be able to break this apart in order to see the underlying elements and properly promote them to SSA values. The hope is that this fixes some performance regressions on x86-32 with the new SROA pass. Unfortunately, this causes quite a bit of churn in the test cases, and bloats some IR that comes out. When we see an alloca that consists soley of bits and bytes being extracted and re-inserted, we now do some splitting first, before building widened integer "bucket of bits" representations. These are always well folded by instcombine however, so this shouldn't actually result in missed opportunities. If this splitting of all-integer allocas does cause problems (perhaps due to smaller SSA values going into the RA), we could potentially go to some extreme measures to only do this integer splitting trick when there are non-integer component accesses of an alloca, but discovering this is quite expensive: it adds yet another complete walk of the recursive use tree of the alloca. Either way, I will be watching build bots and LNT bots to see what fallout there is here. If anyone gets x86-32 numbers before & after this change, I would be very interested. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166662 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for additional reduction variables: AND, OR, XOR.Nadav Rotem2012-10-25
| | | | | | | | Patch by Paul Redmond <paul.redmond@intel.com>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166649 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement a basic cost model for vector and scalar instructions. Nadav Rotem2012-10-24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166642 91177308-0d34-0410-b5e6-96231b3b80d8
* Tell llvm-mc we're using intel syntax, so we don't have to use directives.Chad Rosier2012-10-24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166640 91177308-0d34-0410-b5e6-96231b3b80d8
* [ms-inline asm] Add back-end test case for r166632. Make sure we emit theChad Rosier2012-10-24
| | | | | | | | correct .s output as well as get the correct encoding by the integrated assembler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166638 91177308-0d34-0410-b5e6-96231b3b80d8
* Update GVN to support vectors of pointers.Hal Finkel2012-10-24
| | | | | | | GVN will now generate ptrtoint instructions for vectors of pointers. Fixes PR14166. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166624 91177308-0d34-0410-b5e6-96231b3b80d8
* LoopVectorizer: Add a basic cost model which uses the VTTI interface.Nadav Rotem2012-10-24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166620 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a miscompilation caused by a typo. When turning a adde with negative valueEvan Cheng2012-10-24
| | | | | | | | | | into a sbc with a positive number, the immediate should be complemented, not negated. Also added a missing pattern for ARM codegen. rdar://12559385 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166613 91177308-0d34-0410-b5e6-96231b3b80d8