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* [mips][msa] Add insert.d instruction.Matheus Almeida2014-01-31
| | | | | | | This instruction is only available on Mips64 cores that implement the MSA ASE. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200543 91177308-0d34-0410-b5e6-96231b3b80d8
* Update FileCheck prefixes in preparation for the addition of Mips64 MSA tests.Matheus Almeida2014-01-31
| | | | | | | No functional changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200541 91177308-0d34-0410-b5e6-96231b3b80d8
* [vectorizer] Tweak the way we do small loop runtime unrolling in theChandler Carruth2014-01-31
| | | | | | | | | | | | | | loop vectorizer to not do so when runtime pointer checks are needed and share code with the new (not yet enabled) load/store saturation runtime unrolling. Also ensure that we only consider the runtime checks when the loop hasn't already been vectorized. If it has, the runtime check cost has already been paid. I've fleshed out a test case to cover the scalar unrolling as well as the vector unrolling and comment clearly why we are or aren't following the pattern. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200530 91177308-0d34-0410-b5e6-96231b3b80d8
* Move address override handling in X86MCCodeEmitter to a place where it works ↵Craig Topper2014-01-31
| | | | | | for VEX encoded instructions too. This allows 32-bit addressing to work in 64-bit mode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200516 91177308-0d34-0410-b5e6-96231b3b80d8
* This patch teaches the DAGCombiner how to fold insert_subvector nodesManman Ren2014-01-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | when the input is a concat_vectors and the insert replaces one of the concat halves: Lower half: fold (insert_subvector (concat_vectors X, Y), Z) -> (concat_vectors Z, Y) Upper half: fold (insert_subvector (concat_vectors X, Y), Z) -> (concat_vectors X, Z) This can be seen with the following IR: define <8 x float> @lower_half(<4 x float> %v1, <4 x float> %v2, <4 x float> %v3) { %1 = shufflevector <4 x float> %v1, <4 x float> %v2, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> %2 = tail call <8 x float> @llvm.x86.avx.vinsertf128.ps.256(<8 x float> %1, <4 x float> %v3, i8 0) The vinsertf128 intrinsic is converted into an insert_subvector node in SelectionDAGBuilder.cpp. Using AVX, without the patch this generates two vinsertf128 instructions: vinsertf128 $1, %xmm1, %ymm0, %ymm0 vinsertf128 $0, %xmm2, %ymm0, %ymm0 With the patch this is optimized into: vinsertf128 $1, %xmm1, %ymm2, %ymm0 Patch by Robert Lougher. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200506 91177308-0d34-0410-b5e6-96231b3b80d8
* PGO branch weight: update edge weights in SelectionDAGBuilder.Manman Ren2014-01-31
| | | | | | | | | | | | | | | | | When converting from "or + br" to two branches, or converting from "and + br" to two branches, we correctly update the edge weights of the two branches. The previous attempt at r200431 was reverted at r200434 because of two testing case failures. I modified my patch a little, but forgot to re-run "make check-all". Testing case CodeGen/ARM/lsr-unfolded-offset.ll is updated because of the patch's impact on branch probability which causes changes in spill placement. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200502 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow speculating llvm.sqrt, fma and fmuladdMatt Arsenault2014-01-31
| | | | | | | | This doesn't set errno, so this should be OK. Also update the documentation to explicitly state that errno are not set. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200501 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a link to a bug to a couple of FIXMEsTimur Iskhodzhanov2014-01-30
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200500 91177308-0d34-0410-b5e6-96231b3b80d8
* [x86] Fix signed relocations for i64i32imm operandsDavid Woodhouse2014-01-30
| | | | | | | | | These should end up (in ELF) as R_X86_64_32S relocs, not R_X86_64_32. Kill the horrid and incomplete special case and FIXME in EncodeInstruction() and set things up so it can infer the signedness from the ImmType just like it can the size and whether it's PC-relative. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200495 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Custom lower concat_vector patterns with v4i16, v4i32, v8i8, ↵Chad Rosier2014-01-30
| | | | | | v8i16, v16i8 types. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200491 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PR18381 - print a minimal diagnostic rather than assert on unresolved ↵Timur Iskhodzhanov2014-01-30
| | | | | | .secidx target git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200490 91177308-0d34-0410-b5e6-96231b3b80d8
* Only ELF has a dynamic symbol table. Remove it from ObjectFile.Rafael Espindola2014-01-30
| | | | | | | | | COFF has only one symbol table. MachO has a LC_DYSYMTAB, but that is not a symbol table, just extra info about the one symbol table (LC_SYMTAB). IR (coming soon) also has only one table. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200488 91177308-0d34-0410-b5e6-96231b3b80d8
* This has been fixed.Rafael Espindola2014-01-30
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200487 91177308-0d34-0410-b5e6-96231b3b80d8
* [Stackmaps] Record the stack size of each function that contains a ↵Juergen Ributzka2014-01-30
| | | | | | | | | | stackmap/patchpoint intrinsic. Re-applying the patch, but this time without using AsmPrinter methods. Reviewed by Andy git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200481 91177308-0d34-0410-b5e6-96231b3b80d8
* Explicitly specify the CPU to avoid Atom-specific assembly mismatchTimur Iskhodzhanov2014-01-30
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200473 91177308-0d34-0410-b5e6-96231b3b80d8
* Reenable ARM EHABI on Android.Evgeniy Stepanov2014-01-30
| | | | | | | Broken in r200388. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200466 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement SPARCv9 atomic_swap_64 with a pseudo.Jakob Stoklund Olesen2014-01-30
| | | | | | | | The SWAP instruction only exists in a 32-bit variant, but the 64-bit atomic swap can be implemented in terms of CASX, like the other atomic rmw primitives. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200453 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM IAS: support .object_archSaleem Abdulrasool2014-01-30
| | | | | | | | | | The .object_arch directive indicates an alternative architecture to be specified in the object file. The directive does *not* effect the enabled feature bits for the object file generation. This is particularly useful when the code performs runtime detection and would like to indicate a lower architecture as the requirements than the actual instructions used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200451 91177308-0d34-0410-b5e6-96231b3b80d8
* tools: add support for decoding ARM attributesSaleem Abdulrasool2014-01-30
| | | | | | | | Enhance the ARM specific parsing support in llvm-readobj to support attributes. This allows for simpler tests to validate encoding of the build attributes as specified in the ARM ELF specification. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200450 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM IAS: support .movspSaleem Abdulrasool2014-01-30
| | | | | | | | .movsp is an ARM unwinding directive that indicates to the unwinder that a register contains an offset from the current stack pointer. If the offset is unspecified, it defaults to zero. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200449 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: suuport .tlsdescseq directiveSaleem Abdulrasool2014-01-30
| | | | | | | | | | | This enhances the ARMAsmParser to handle .tlsdescseq directives. This is a slightly special relocation. We must be able to generate them, but not consume them in assembly. The relocation is meant to assist the linker in generating a TLS descriptor sequence. The ELF target streamer is enhanced to append additional fixups into the current segment and that is used to emit the new R_ARM_TLS_DESCSEQ relocations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200448 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: support TLS descriptor relocationsSaleem Abdulrasool2014-01-30
| | | | | | | | Add support for tlsdesc relocations which are part of the ABI, marked as experimental. These relocations permit the linker to perform TLS reference optimizations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200447 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: support tlscall relocationsSaleem Abdulrasool2014-01-30
| | | | | | | | | | | | | | This adds support for TLS CALL relocations. TLS CALL relocations are used to indicate to the linker to generate appropriate entries to resolve TLS references via an appropriate function invocation (e.g. __tls_get_addr(PLT)). In order to accomodate the linker relaxation of the TLS access model for the references (GD/LD -> IE, IE -> LE), the relocation addend must be incomplete. This requires that the partial inplace value is also incomplete (i.e. 0). We simply avoid the offset value calculation at the time of the fixup adjustment in the ARM assembler backend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200446 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "[Stackmaps] Record the stack size of each function that contains a ↵Juergen Ributzka2014-01-30
| | | | | | | | stackmap/patchpoint intrinsic." This reverts commit r200444 to unbreak buildbots. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200445 91177308-0d34-0410-b5e6-96231b3b80d8
* [Stackmaps] Record the stack size of each function that contains a ↵Juergen Ributzka2014-01-30
| | | | | | | | stackmap/patchpoint intrinsic. Reviewed by Andy git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200444 91177308-0d34-0410-b5e6-96231b3b80d8
* Reland r200340 - 'Add line table debug info to COFF files when using a win32 ↵Timur Iskhodzhanov2014-01-30
| | | | | | | | triple' This incorporates a couple of fixes reviewed at http://llvm-reviews.chandlerc.com/D2651 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200440 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r200431 due to bot failures.Manman Ren2014-01-30
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200434 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix TLS handling in ELF's getAddress and llvm-nm to print 'D' for it.Rafael Espindola2014-01-30
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200433 91177308-0d34-0410-b5e6-96231b3b80d8
* PGO branch weight: update edge weights in SelectionDAGBuilder.Manman Ren2014-01-30
| | | | | | | | | When converting from "or + br" to two branches, or converting from "and + br" to two branches, we correctly update the edge weights of the two branches. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200431 91177308-0d34-0410-b5e6-96231b3b80d8
* PGO branch weight: update edge weights in IfConverter.Manman Ren2014-01-29
| | | | | | | | | | | | | | This commit only handles IfConvertTriangle. To update edge weights of a successor, one interface is added to MachineBasicBlock: /// Set successor weight of a given iterator. setSuccWeight(succ_iterator I, uint32_t weight) An existing testing case test/CodeGen/Thumb2/v8_IT_5.ll is updated, since we now correctly update the edge weights, the cold block is placed at the end of the function and we jump to the cold block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200428 91177308-0d34-0410-b5e6-96231b3b80d8
* If we use DW_AT_ranges we need to specify a base address that rangesEric Christopher2014-01-29
| | | | | | | | are relative to in the compile unit. Currently let's just use 0... Thanks to Greg Clayton for the catch! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200425 91177308-0d34-0410-b5e6-96231b3b80d8
* Turn on CU ranges if we've got multiple compile units in the sameEric Christopher2014-01-29
| | | | | | | | module since there's no range guarantee that we could make given output order. This also fixes up the testcases that have multiple CUs to have the correct range offset. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200422 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-cov: Expect a source file as a positional parameterJustin Bogner2014-01-29
| | | | | | | | | | | Currently, llvm-cov isn't command-line compatible with gcov, which accepts a source file name as its first parameter and infers the gcno and gcda file names from that. This change keeps our -gcda and -gcno options available for convenience in overriding this behaviour, but adds the required parameter and inference behaviour as a compatible default. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200417 91177308-0d34-0410-b5e6-96231b3b80d8
* MC: Better management of macro argumentsDavid Majnemer2014-01-29
| | | | | | | | | | | | | The linux kernel makes uses of a GAS `feature' which substitutes nothing for macro arguments which aren't specified. Proper support for these kind of macro arguments necessitated a cleanup of differences between `GAS' and `Darwin' dialect macro processing. Differential Revision: http://llvm-reviews.chandlerc.com/D2634 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200409 91177308-0d34-0410-b5e6-96231b3b80d8
* LoopVectorizer: Add a test case for unrolling of small loops that need a runtimeArnold Schwaighofer2014-01-29
| | | | | | check. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200408 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for PC-relative non-extern relocations to RuntimeDyldMachO.Lang Hames2014-01-29
| | | | | | | | | | | Also replaces testcase for r180790 (support for absolute non-externs relocs) with a more robust version. <rdar://problem/15864721> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200404 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips][msa] Add fill.d instruction.Matheus Almeida2014-01-29
| | | | | | | | | This instruction is only available on Mips64 cores that implement the MSA ASE. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200400 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips][msa] CHECK-DAG-ize MSA 2r_vector_scalar.ll test.Matheus Almeida2014-01-29
| | | | | | | | | | This update is a preparation for the addition of Mips64 MSA tests. No functional changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200399 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips][msa] Add copy_{u,s}.d.Matheus Almeida2014-01-29
| | | | | | | | | These instructions are only available on Mips64 cores that implement the MSA ASE. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200398 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips][msa] CHECK-DAG-ize MSA elm_copy.ll test.Matheus Almeida2014-01-29
| | | | | | | | | | This update is a preparation for the addition of Mips64 MSA tests. No functional changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200395 91177308-0d34-0410-b5e6-96231b3b80d8
* [LPM] Fix PR18643, another scary place where loop transforms failed toChandler Carruth2014-01-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | preserve loop simplify of enclosing loops. The problem here starts with LoopRotation which ends up cloning code out of the latch into the new preheader it is buidling. This can create a new edge from the preheader into the exit block of the loop which breaks LoopSimplify form. The code tries to fix this by splitting the critical edge between the latch and the exit block to get a new exit block that only the latch dominates. This sadly isn't sufficient. The exit block may be an exit block for multiple nested loops. When we clone an edge from the latch of the inner loop to the new preheader being built in the outer loop, we create an exiting edge from the outer loop to this exit block. Despite breaking the LoopSimplify form for the inner loop, this is fine for the outer loop. However, when we split the edge from the inner loop to the exit block, we create a new block which is in neither the inner nor outer loop as the new exit block. This is a predecessor to the old exit block, and so the split itself takes the outer loop out of LoopSimplify form. We need to split every edge entering the exit block from inside a loop nested more deeply than the exit block in order to preserve all of the loop simplify constraints. Once we try to do that, a problem with splitting critical edges surfaces. Previously, we tried a very brute force to update LoopSimplify form by re-computing it for all exit blocks. We don't need to do this, and doing this much will sometimes but not always overlap with the LoopRotate bug fix. Instead, the code needs to specifically handle the cases which can start to violate LoopSimplify -- they aren't that common. We need to see if the destination of the split edge was a loop exit block in simplified form for the loop of the source of the edge. For this to be true, all the predecessors need to be in the exact same loop as the source of the edge being split. If the dest block was originally in this form, we have to split all of the deges back into this loop to recover it. The old mechanism of doing this was conservatively correct because at least *one* of the exiting blocks it rewrote was the DestBB and so the DestBB's predecessors were fixed. But this is a much more targeted way of doing it. Making it targeted is important, because ballooning the set of edges touched prevents LoopRotate from being able to split edges *it* needs to split to preserve loop simplify in a coherent way -- the critical edge splitting would sometimes find the other edges in need of splitting but not others. Many, *many* thanks for help from Nick reducing these test cases mightily. And helping lots with the analysis here as this one was quite tricky to track down. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200393 91177308-0d34-0410-b5e6-96231b3b80d8
* Enable EHABI by defaultRenato Golin2014-01-29
| | | | | | | | | | | | | | | | | | | | | | After all hard work to implement the EHABI and with the test-suite passing, it's time to turn it on by default and allow users to disable it as a work-around while we fix the eventual bugs that show up. This commit also remove the -arm-enable-ehabi-descriptors, since we want the tables to be printed every time the EHABI is turned on for non-Darwin ARM targets. Although MCJIT EHABI is not working yet (needs linking with the right libraries), this commit also fixes some relocations on MCJIT regarding the EH tables/lib calls, and update some tests to avoid using EH tables when none are needed. The EH tests in the test-suite that were previously disabled on ARM now pass with these changes, so a follow-up commit on the test-suite will re-enable them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200388 91177308-0d34-0410-b5e6-96231b3b80d8
* MC: Reorganize macro MC test along dialect linesDavid Majnemer2014-01-29
| | | | | | | | | | | | This commit seeks to do two things: - Run the surfeit of tests under the Darwin dialect. This ends up affecting tests which assumed that spaces could deliminate arguments. - The GAS dialect tests should limit their surface area to things that could plausibly work under GAS. For example, Darwin style arguments have no business being in such a test. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200383 91177308-0d34-0410-b5e6-96231b3b80d8
* [asan] simplify a test Kostya Serebryany2014-01-29
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200378 91177308-0d34-0410-b5e6-96231b3b80d8
* [Sparc] Use %r_disp32 for pc_rel entries in FDE as well.Venkatraman Govindaraju2014-01-29
| | | | | | | | This makes MCAsmInfo::getExprForFDESymbol() a virtual function and overrides it in SparcMCAsmInfo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200376 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r200340, "Add line table debug info to COFF files when using a win32 ↵NAKAMURA Takumi2014-01-29
| | | | | | | | triple." It was incompatible with --target=i686-win32. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200375 91177308-0d34-0410-b5e6-96231b3b80d8
* [Sparc] Use %r_disp32 for pc_rel entries in gcc_except_table and eh_frame.Venkatraman Govindaraju2014-01-29
| | | | | | | | | Otherwise, assembler (gas) fails to assemble them with error message "operation combines symbols in different segments". This is because MC computes pc_rel entries with subtract expression between labels from different sections. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200373 91177308-0d34-0410-b5e6-96231b3b80d8
* [LPM] Fix PR18642, a pretty nasty bug in IndVars that "never mattered"Chandler Carruth2014-01-29
| | | | | | | | | | | | | | | | | | | | | | | because of the inside-out run of LoopSimplify in the LoopPassManager and the fact that LoopSimplify couldn't be "preserved" across two independent LoopPassManagers. Anyways, in that case, IndVars wasn't correctly preserving an LCSSA PHI node because it thought it was rewriting (via SCEV) the incoming value to a loop invariant value. While it may well be invariant for the current loop, it may be rewritten in terms of an enclosing loop's values. This in and of itself is fine, as the LCSSA PHI node in the enclosing loop for the inner loop value we're rewriting will have its own LCSSA PHI node if used outside of the enclosing loop. With me so far? Well, the current loop and the enclosing loop may share an exiting block and exit block, and when they do they also share LCSSA PHI nodes. In this case, its not valid to RAUW through the LCSSA PHI node. Expected crazy test included. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200372 91177308-0d34-0410-b5e6-96231b3b80d8
* We do use pipefail these days. Update the test.Rafael Espindola2014-01-29
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200370 91177308-0d34-0410-b5e6-96231b3b80d8
* [SparcV9] Use correct register class (I64RegClass) to hold the address of ↵Venkatraman Govindaraju2014-01-29
| | | | | | _GLOBAL_OFFSET_TABLE_ in sparcv9. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200368 91177308-0d34-0410-b5e6-96231b3b80d8
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