| Commit message (Expand) | Author | Age |
|---|
| * | Add ARM cortex-r5 subtarget. | Quentin Colombet | 2012-12-21 |
| * | On some ARM cpus, flags setting movs with shifter operand, i.e. lsl, lsr, asr, | Evan Cheng | 2012-12-20 |
| * | Add cortex-a5 subtarget to the supported ARM architectures | Quentin Colombet | 2012-11-29 |
| * | Add LLVM support for Swift. | Bob Wilson | 2012-09-29 |
| * | Removed the VMLxForwarding feature for the Cortex-A15 target. | Silviu Baranga | 2012-09-17 |
| * | This patch introduces A15 as a target in LLVM. | Silviu Baranga | 2012-09-13 |
| * | Support fpv4 for ARM Cortex-M4. | Jiangning Liu | 2012-08-02 |
| * | I'm introducing a new machine model to simultaneously allow simple | Andrew Trick | 2012-07-07 |
| * | Use "NoItineraries" for processors with no itineraries. | Andrew Trick | 2012-06-22 |
| * | Clean up ARM fused multiply + add/sub support some more: rename some isel | Evan Cheng | 2012-04-11 |
| * | Fix a number of problems with ARM fused multiply add/subtract instructions. | Evan Cheng | 2012-04-11 |
| * | updated patch for the ARM fused multiply add/sub | Sebastian Pop | 2012-03-05 |
| * | Re-commit r151623 with fix. Only issue special no-return calls if it's a dire... | Evan Cheng | 2012-02-28 |
| * | Revert r151623 "Some ARM implementaions, e.g. A-series, does return stack pre... | Daniel Dunbar | 2012-02-28 |
| * | Some ARM implementaions, e.g. A-series, does return stack prediction. That is, | Evan Cheng | 2012-02-28 |
| * | Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,... | Jia Liu | 2012-02-18 |
| * | Add fused multiple+add instructions from VFPv4. | Anton Korobeynikov | 2012-01-22 |
| * | Remove NaClMode | David Meyer | 2011-10-18 |
| * | Check in a patch that has already been code reviewed by Owen that I'd forgott... | James Molloy | 2011-09-28 |
| * | Fix a bug introduced during refactoring a couple of months ago. Cortex-M3 doe... | Evan Cheng | 2011-09-20 |
| * | Add a new MC bit for NaCl (Native Client) mode. NaCl requires that certain | Nick Lewycky | 2011-09-05 |
| * | Remove stray fullstop. | Nick Lewycky | 2011-08-25 |
| * | Rename attribute 'thumb' to a more descriptive 'thumb-mode'. | Evan Cheng | 2011-07-07 |
| * | Sink feature IsThumb into MC layer. | Evan Cheng | 2011-07-07 |
| * | Change some ARM subtarget features to be single bit yes/no in order to sink t... | Evan Cheng | 2011-07-07 |
| * | Factor ARM triple parsing out of ARMSubtarget. Another step towards making AR... | Evan Cheng | 2011-07-07 |
| * | ARMv7M vs. ARMv7E-M support. | Jim Grosbach | 2011-07-01 |
| * | This patch combines several changes from Evan Cheng for rdar://8659675. | Bob Wilson | 2011-04-19 |
| * | Add -mcpu=cortex-a9-mp. It's cortex-a9 with MP extension. rdar://8648637. | Bob Wilson | 2011-04-19 |
| * | Avoid some 's' 16-bit instruction which partially update CPSR | Bob Wilson | 2011-04-19 |
| * | Distribute (A + B) * C to (A * C) + (B * C) to make use of NEON multiplier | Evan Cheng | 2011-03-31 |
| * | Add Neon VCVT instructions for f32 <-> f16 conversions. | Bob Wilson | 2010-12-15 |
| * | Code clean up. | Evan Cheng | 2010-12-05 |
| * | Making use of VFP / NEON floating point multiply-accumulate / subtraction is | Evan Cheng | 2010-12-05 |
| * | Add some missing isel predicates on def : pat patterns to avoid generating VF... | Evan Cheng | 2010-11-12 |
| * | Fix preload instruction isel. Only v7 supports pli, and only v7 with mp exten... | Evan Cheng | 2010-11-03 |
| * | PR8359: The ARM backend may end up allocating registers D16 to D31 when | Bob Wilson | 2010-10-12 |
| * | Nuke it from orbit. It's the only way to be sure. | Jim Grosbach | 2010-09-30 |
| * | Teach if-converter to be more careful with predicating instructions that would | Evan Cheng | 2010-09-10 |
| * | 80 column cleanup. | Jim Grosbach | 2010-08-17 |
| * | fix emacs language spec's, patch by Edmund Grimley-Evans! | Chris Lattner | 2010-08-17 |
| * | cortex m4 has floating point support, but only single precision. | Jim Grosbach | 2010-08-11 |
| * | Report error if codegen tries to instantiate a ARM target when the cpu does s... | Evan Cheng | 2010-08-11 |
| * | ArchV7M implies HW division instructions. | Evan Cheng | 2010-08-11 |
| * | ArchV6T2, V7A, and V7M implies Thumb2; Archv7A implies NEON. | Evan Cheng | 2010-08-11 |
| * | Add ARM Archv6M and let it implies FeatureDB (having dmb, etc.) | Evan Cheng | 2010-08-11 |
| * | Add Cortex-M0 support. It's a ARMv6m device (no ARM mode) with some 32-bit | Evan Cheng | 2010-08-11 |
| * | - Add subtarget feature -mattr=+db which determine whether an ARM cpu has the | Evan Cheng | 2010-08-11 |
| * | Change -prefer-32bit-thumb to attribute -mattr=+32bit instead to disable more... | Evan Cheng | 2010-08-09 |
| * | Add an ARM "feature". Cortex-a8 fp comparison is very slow (> 20 cycles). | Evan Cheng | 2010-07-13 |
