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path: root/lib/Target/PowerPC/PPCRegisterInfo.td
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* llvm bug #1350, parts 1, 2, and 3.Nate Begeman2007-05-01
* We'd still like to register allocate r2 on darwin before the callee-saveNate Begeman2007-01-29
* Changes from Nick Lewycky with a simplified PPCTargetAsmInfo.Jim Laskey2006-12-21
* in ppc64-mode, don't allocate the 32-bit version of r13 either.Chris Lattner2006-11-20
* r13 is the thread pointer on darwin/ppc64, don't allocate it.Chris Lattner2006-11-20
* This is a general clean up of the PowerPC ABI. Address several problems andJim Laskey2006-11-16
* Rework PPC64 calls. Now we have a LR8/CTR8 register which the PPC64 callsChris Lattner2006-11-14
* Constify some methods. Patch provided by Anton Vayvod, thanks!Chris Lattner2006-08-17
* Remove the -darwin and -aix llc options, inferring darwinism and aixism fromChris Lattner2006-06-16
* Revert Nate's CR patch from last night, which caused many regressions (e.g. f...Chris Lattner2006-05-04
* Since we don't handle callee-save CRs right yet, don't allocate them. AlsoNate Begeman2006-05-02
* Prefer to allocate V2-V5 before V0,V1. This lets us generate code like this:Chris Lattner2006-04-17
* add all supported formats to the vector register fileChris Lattner2006-03-25
* Add dwarf register numbering to register data.Jim Laskey2006-03-24
* Claim to have v16i8 for perm masksChris Lattner2006-03-20
* For functions that use vector registers, save VRSAVE, mark usedChris Lattner2006-03-13
* Bye bye HACKTROCITY.Evan Cheng2005-12-22
* Pattern-match return. Includes gross hack!Nate Begeman2005-12-20
* Add a second vector type to the VRRC register class, and fix some patternsNate Begeman2005-12-16
* Support multiple ValueTypes per RegisterClass, needed for upcoming vectorNate Begeman2005-12-01
* Cosmetic change, better reflects actual valuesNate Begeman2005-12-01
* Add the majority of the vector machien value types we expect to support,Nate Begeman2005-11-29
* don't say this is i128, because it isn't yet. Hopefully nate will changeChris Lattner2005-11-29
* Small tweaks noticed while on the plane.Nate Begeman2005-11-26
* Some first bits of AltiVec stuff: Instruction Formats, Encodings, andNate Begeman2005-11-23
* apply some tblgen majik to simplify the X register definitionsChris Lattner2005-10-19
* Make a new reg class for 64 bit regs that aliases the 32 bit regs. ThisNate Begeman2005-10-19
* First bits of 64 bit PowerPC stuff, currently disabled. A lot of this isNate Begeman2005-10-18
* Remove an unnecsesary file. PPC32 and PPC64 share architected registers.Nate Begeman2005-10-14
* Remove some regs that are not used.Chris Lattner2005-08-22
* Nate noticed that 30% of the malloc/frees in llc come from calls to Lowercase...Chris Lattner2005-08-22
* Revamp the Register class, and allow the use of the RegisterGroup class toChris Lattner2004-09-14
* Register classes are target-dependentMisha Brukman2004-08-17
* Fix frame pointer handling:Nate Begeman2004-08-16
* Reenable the CCRCChris Lattner2004-08-15
* Mark R2 as available for allocation on Darwin/PPC32, but not AIX/PPC64Misha Brukman2004-08-12
* * Set the is64bit boolean flag in PowerPCRegisterInfoMisha Brukman2004-08-11
* Renamed PPC32 (namespace for regs, opcodes) to PPC to include 64-bit targetsMisha Brukman2004-08-10
* Renamed files:Misha Brukman2004-07-27
* LR is a 32-bit int regMisha Brukman2004-07-27
* * Enable allocation of registers r2-r10Misha Brukman2004-07-16
* * Do not allocate r0 as we use it indiscriminantly in the instr selector.Misha Brukman2004-07-01
* * Allow more registers to be allocated from the general register poolMisha Brukman2004-06-30
* Only allocate non-volatile registers R13-31 (for now).Misha Brukman2004-06-29
* Initial revisionMisha Brukman2004-06-21