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path: root/lib/Target/X86/X86InstrSSE.td
Commit message (Expand)AuthorAge
* [X86] Always prefer to lower a VECTOR_SHUFFLE into a BLENDI instead of SHUFP ...Andrea Di Biagio2014-06-25
* [X86] Add target combine rule to select ADDSUB instructions from a build_vectorAndrea Di Biagio2014-06-25
* [X86] Add ISel patterns to select SSE3/AVX ADDSUB instructions.Andrea Di Biagio2014-06-21
* [x86] Make the x86 PACKSSWB, PACKSSDW, PACKUSWB, and PACKUSDWChandler Carruth2014-06-20
* [X86] Remove AVX1 vbroadcast intrinsicsAdam Nemet2014-05-29
* Added more insertps optimizationsFilipe Cabecinhas2014-05-19
* TableGen: use correct MIOperand when printing aliasesTim Northover2014-05-15
* TableGen/ARM64: print aliases even if they have syntax variants.Tim Northover2014-05-15
* X86: Lower SMUL_LOHI of v4i32 to pmuldq when SSE4.1 is available.Benjamin Kramer2014-04-26
* X86: Add patterns for MULHU/MULHS of v8i16 and v16i16.Benjamin Kramer2014-04-26
* [X86] Fix missing/wrong scheduling model found by code inspection.Quentin Colombet2014-04-23
* Rename X86insrtps to the proper instruction name.Filipe Cabecinhas2014-04-21
* X86: Pattern match scalar loads + vcvtph2ps into just vcvtph2ps.Benjamin Kramer2014-04-18
* Add support for load folding of avx1 logical instructionsJim Grosbach2014-04-09
* Revert r205599, the commit was not intended to have so many changesQuentin Colombet2014-04-04
* [RegAllocGreedy][Last Chance Recoloring] Emit diagnostics when last chanceQuentin Colombet2014-04-04
* Fix AVX2 Gather execution domains. Cameron McInally2014-03-25
* [X86][ISelDAG] Add missing fallback patterns for avx2 broadcast instructions.Quentin Colombet2014-03-24
* [X86][SchedModel] Add missing scheduling model for SSE related instructions.Quentin Colombet2014-02-24
* [x86] Switch PAUSE instruction to use XS prefix instead of HasREPPrefix. Remo...Craig Topper2014-02-20
* Add a bunch of OpSize32 tags to 64-bit mode only instructions to match their ...Craig Topper2014-02-18
* Add an x86 prefix encoding for instructions that would decode to a different ...Craig Topper2014-02-18
* Recommit r201059 and r201060 with hopefully a fix for its original failure.Craig Topper2014-02-10
* Revert r201059 and r201060.Bob Wilson2014-02-10
* Add MRMXr/MRMXm form to X86 for use by instructions which treat the 'reg' fie...Craig Topper2014-02-10
* X86: Resolve a long standing FIXME and properly isel pextr[bw].Jim Grosbach2014-02-07
* X86: deduplicate V[SZ]EXT_MOVL and V[SZ]EXT nodesTim Northover2014-02-06
* Merge x86 HasOpSizePrefix/HasOpSize16Prefix into a 2-bit OpSize field with 0 ...Craig Topper2014-02-02
* Remove duplicate patternsCraig Topper2014-01-30
* Remove some AddedComplexity tags that were forcing priority for AVX over SSE....Craig Topper2014-01-30
* Add OpSize16 flags to 32-bit CRC32 instructions so they can be encoded correc...Craig Topper2014-01-17
* Separate the concept of 16-bit/32-bit operand size controlled by 0x66 prefix ...Craig Topper2014-01-14
* Add the other form of movq xmm,xmm for the disassembler.Craig Topper2014-01-05
* Use patterns to remove some duplicate instructions.Craig Topper2014-01-05
* Mark x86 _alt instructions as AsmParserOnly so they will be omitted from disa...Craig Topper2014-01-05
* Add a new x86 specific instruction flag to force some isCodeGenOnly instructi...Craig Topper2014-01-05
* Mark all x86 Int_ and _Int patterns as isCodeGenOnly so the disassembler tabl...Craig Topper2014-01-02
* [x86] Rename In32BitMode predicate to Not64BitModeEric Christopher2013-12-20
* AVX-512: Added legal type MVT::i1 and VK1 register for it.Elena Demikhovsky2013-12-16
* Added new X86 patterns to select SSE scalar fp arithmetic instructions fromAndrea Di Biagio2013-12-12
* Ensure that the backend no longer emits unnecessary vector insert instructionsAndrea Di Biagio2013-12-10
* Add an intrinsic for the SSE2 PAUSE instruction.Cameron McInally2013-11-26
* Fix assembly operands for the SSE2 cvtsd2ss instruction.Cameron McInally2013-11-19
* Lift alignment restrictions on load folding for a significant portion of AVX ...Craig Topper2013-11-05
* Fix PR17764Michael Liao2013-11-02
* X86: Custom lower sext v16i8 to v16i16, and the corresponding truncate.Benjamin Kramer2013-10-23
* X86: Custom lower zext v16i8 to v16i16.Benjamin Kramer2013-10-23
* Replace (V)MOVZDI2PDIrr/rm instructions with patterns that select (V)MOVDI2PD...Craig Topper2013-10-22
* X86 vector element shift-by-immediate instructions take i8 immediates. MakeLang Hames2013-10-21
* Remove x86_sse42_crc32_64_8 intrinsic. It has no functional difference from x...Craig Topper2013-10-15