summaryrefslogtreecommitdiff
path: root/lib
Commit message (Collapse)AuthorAge
...
* DebugInfo: Flag type unit references as declarationsDavid Blaikie2014-01-31
| | | | | | | | | This ensures DWARF consumers don't confuse these references for definitions. I'd argue it might be nice to improve debuggers so we don't need this, but it's just one field in an abbreviation anyway - so it doesn't seem worth the fight. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200569 91177308-0d34-0410-b5e6-96231b3b80d8
* x86: Rename NumBytesForCalleeToPush to ...Pop for accuracyReid Kleckner2014-01-31
| | | | | | | If we have a callee cleanup convention, the callee is going to pop the arguments off the stack, not push them on. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200566 91177308-0d34-0410-b5e6-96231b3b80d8
* [ms-cxxabi] Add a new calling convention that swaps 'this' and 'sret'Reid Kleckner2014-01-31
| | | | | | | | | | | | | | | | | | | | MSVC always places the 'this' parameter for a method first. The implicit 'sret' pointer for methods always comes second. We already implement this for __thiscall by putting sret parameters on the stack, but __cdecl methods require putting both parameters on the stack in opposite order. Using a special calling convention allows frontends to keep the sret parameter first, which avoids breaking lots of assumptions in LLVM and Clang. Fixes PR15768 with the corresponding change in Clang. Reviewers: ributzka, majnemer Differential Revision: http://llvm-reviews.chandlerc.com/D2663 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200561 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips][msa] Add insert.d instruction.Matheus Almeida2014-01-31
| | | | | | | This instruction is only available on Mips64 cores that implement the MSA ASE. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200543 91177308-0d34-0410-b5e6-96231b3b80d8
* [vectorizer] Tweak the way we do small loop runtime unrolling in theChandler Carruth2014-01-31
| | | | | | | | | | | | | | loop vectorizer to not do so when runtime pointer checks are needed and share code with the new (not yet enabled) load/store saturation runtime unrolling. Also ensure that we only consider the runtime checks when the loop hasn't already been vectorized. If it has, the runtime check cost has already been paid. I've fleshed out a test case to cover the scalar unrolling as well as the vector unrolling and comment clearly why we are or aren't following the pattern. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200530 91177308-0d34-0410-b5e6-96231b3b80d8
* Separate x86 opcode maps and 0x66/0xf2/0xf3 prefixes from each other in the ↵Craig Topper2014-01-31
| | | | | | TSFlags. This greatly simplifies the switch statements in the disassembler tables and the code emitters. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200522 91177308-0d34-0410-b5e6-96231b3b80d8
* Move REP out of the Prefix field of the X86 format. Give it its own bit. It ↵Craig Topper2014-01-31
| | | | | | had special handling anyway and this enables a future patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200520 91177308-0d34-0410-b5e6-96231b3b80d8
* Move address override handling in X86CodeEmitter to a place where it works ↵Craig Topper2014-01-31
| | | | | | for VEX encoded instructions too. This allows 32-bit addressing to work in 64-bit mode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200517 91177308-0d34-0410-b5e6-96231b3b80d8
* Move address override handling in X86MCCodeEmitter to a place where it works ↵Craig Topper2014-01-31
| | | | | | for VEX encoded instructions too. This allows 32-bit addressing to work in 64-bit mode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200516 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a bug in gcov instrumentation introduced by r195513. <rdar://15930350>Bob Wilson2014-01-31
| | | | | | | | | | The entry block of a function starts with all the static allocas. The change in r195513 splits the block before those allocas, which has the effect of turning them into dynamic allocas. That breaks all sorts of things. Change to split after the initial allocas, and also add a comment explaining why the block is split. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200515 91177308-0d34-0410-b5e6-96231b3b80d8
* [Sparc] Save and restore float registers that may be used for parameter passing.Venkatraman Govindaraju2014-01-31
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200509 91177308-0d34-0410-b5e6-96231b3b80d8
* This patch teaches the DAGCombiner how to fold insert_subvector nodesManman Ren2014-01-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | when the input is a concat_vectors and the insert replaces one of the concat halves: Lower half: fold (insert_subvector (concat_vectors X, Y), Z) -> (concat_vectors Z, Y) Upper half: fold (insert_subvector (concat_vectors X, Y), Z) -> (concat_vectors X, Z) This can be seen with the following IR: define <8 x float> @lower_half(<4 x float> %v1, <4 x float> %v2, <4 x float> %v3) { %1 = shufflevector <4 x float> %v1, <4 x float> %v2, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> %2 = tail call <8 x float> @llvm.x86.avx.vinsertf128.ps.256(<8 x float> %1, <4 x float> %v3, i8 0) The vinsertf128 intrinsic is converted into an insert_subvector node in SelectionDAGBuilder.cpp. Using AVX, without the patch this generates two vinsertf128 instructions: vinsertf128 $1, %xmm1, %ymm0, %ymm0 vinsertf128 $0, %xmm2, %ymm0, %ymm0 With the patch this is optimized into: vinsertf128 $1, %xmm1, %ymm2, %ymm0 Patch by Robert Lougher. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200506 91177308-0d34-0410-b5e6-96231b3b80d8
* DAGCombine should not produce ISD::OR nodes after operation legalization if ↵Owen Anderson2014-01-31
| | | | | | they're not legal. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200503 91177308-0d34-0410-b5e6-96231b3b80d8
* PGO branch weight: update edge weights in SelectionDAGBuilder.Manman Ren2014-01-31
| | | | | | | | | | | | | | | | | When converting from "or + br" to two branches, or converting from "and + br" to two branches, we correctly update the edge weights of the two branches. The previous attempt at r200431 was reverted at r200434 because of two testing case failures. I modified my patch a little, but forgot to re-run "make check-all". Testing case CodeGen/ARM/lsr-unfolded-offset.ll is updated because of the patch's impact on branch probability which causes changes in spill placement. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200502 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow speculating llvm.sqrt, fma and fmuladdMatt Arsenault2014-01-31
| | | | | | | | This doesn't set errno, so this should be OK. Also update the documentation to explicitly state that errno are not set. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200501 91177308-0d34-0410-b5e6-96231b3b80d8
* [x86] Fix signed relocations for i64i32imm operandsDavid Woodhouse2014-01-30
| | | | | | | | | These should end up (in ELF) as R_X86_64_32S relocs, not R_X86_64_32. Kill the horrid and incomplete special case and FIXME in EncodeInstruction() and set things up so it can infer the signedness from the ImmType just like it can the size and whether it's PC-relative. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200495 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Custom lower concat_vector patterns with v4i16, v4i32, v8i8, ↵Chad Rosier2014-01-30
| | | | | | v8i16, v16i8 types. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200491 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PR18381 - print a minimal diagnostic rather than assert on unresolved ↵Timur Iskhodzhanov2014-01-30
| | | | | | .secidx target git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200490 91177308-0d34-0410-b5e6-96231b3b80d8
* Only ELF has a dynamic symbol table. Remove it from ObjectFile.Rafael Espindola2014-01-30
| | | | | | | | | COFF has only one symbol table. MachO has a LC_DYSYMTAB, but that is not a symbol table, just extra info about the one symbol table (LC_SYMTAB). IR (coming soon) also has only one table. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200488 91177308-0d34-0410-b5e6-96231b3b80d8
* [Stackmaps] Record the stack size of each function that contains a ↵Juergen Ributzka2014-01-30
| | | | | | | | | | stackmap/patchpoint intrinsic. Re-applying the patch, but this time without using AsmPrinter methods. Reviewed by Andy git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200481 91177308-0d34-0410-b5e6-96231b3b80d8
* Reenable ARM EHABI on Android.Evgeniy Stepanov2014-01-30
| | | | | | | Broken in r200388. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200466 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Fix typo.Matheus Almeida2014-01-30
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200465 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove duplicate patternsCraig Topper2014-01-30
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200461 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove some AddedComplexity tags that were forcing priority for AVX over ↵Craig Topper2014-01-30
| | | | | | SSE. Use predicates instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200458 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove duplicate pattern and add predicate checks on other patterns.Craig Topper2014-01-30
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200455 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement SPARCv9 atomic_swap_64 with a pseudo.Jakob Stoklund Olesen2014-01-30
| | | | | | | | The SWAP instruction only exists in a 32-bit variant, but the 64-bit atomic swap can be implemented in terms of CASX, like the other atomic rmw primitives. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200453 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM IAS: support .object_archSaleem Abdulrasool2014-01-30
| | | | | | | | | | The .object_arch directive indicates an alternative architecture to be specified in the object file. The directive does *not* effect the enabled feature bits for the object file generation. This is particularly useful when the code performs runtime detection and would like to indicate a lower architecture as the requirements than the actual instructions used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200451 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM IAS: support .movspSaleem Abdulrasool2014-01-30
| | | | | | | | .movsp is an ARM unwinding directive that indicates to the unwinder that a register contains an offset from the current stack pointer. If the offset is unspecified, it defaults to zero. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200449 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: suuport .tlsdescseq directiveSaleem Abdulrasool2014-01-30
| | | | | | | | | | | This enhances the ARMAsmParser to handle .tlsdescseq directives. This is a slightly special relocation. We must be able to generate them, but not consume them in assembly. The relocation is meant to assist the linker in generating a TLS descriptor sequence. The ELF target streamer is enhanced to append additional fixups into the current segment and that is used to emit the new R_ARM_TLS_DESCSEQ relocations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200448 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: support TLS descriptor relocationsSaleem Abdulrasool2014-01-30
| | | | | | | | Add support for tlsdesc relocations which are part of the ABI, marked as experimental. These relocations permit the linker to perform TLS reference optimizations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200447 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: support tlscall relocationsSaleem Abdulrasool2014-01-30
| | | | | | | | | | | | | | This adds support for TLS CALL relocations. TLS CALL relocations are used to indicate to the linker to generate appropriate entries to resolve TLS references via an appropriate function invocation (e.g. __tls_get_addr(PLT)). In order to accomodate the linker relaxation of the TLS access model for the references (GD/LD -> IE, IE -> LE), the relocation addend must be incomplete. This requires that the partial inplace value is also incomplete (i.e. 0). We simply avoid the offset value calculation at the time of the fixup adjustment in the ARM assembler backend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200446 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "[Stackmaps] Record the stack size of each function that contains a ↵Juergen Ributzka2014-01-30
| | | | | | | | stackmap/patchpoint intrinsic." This reverts commit r200444 to unbreak buildbots. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200445 91177308-0d34-0410-b5e6-96231b3b80d8
* [Stackmaps] Record the stack size of each function that contains a ↵Juergen Ributzka2014-01-30
| | | | | | | | stackmap/patchpoint intrinsic. Reviewed by Andy git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200444 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify the handling of iterators in ObjectFile.Rafael Espindola2014-01-30
| | | | | | | | | | | | None of the object file formats reported error on iterator increment. In retrospect, that is not too surprising: no object format stores symbols or sections in a linked list or other structure that requires chasing pointers. As a consequence, all error checking can be done on begin() and end(). This reduces the text segment of bin/llvm-readobj in my machine from 521233 to 518526 bytes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200442 91177308-0d34-0410-b5e6-96231b3b80d8
* Reland r200340 - 'Add line table debug info to COFF files when using a win32 ↵Timur Iskhodzhanov2014-01-30
| | | | | | | | triple' This incorporates a couple of fixes reviewed at http://llvm-reviews.chandlerc.com/D2651 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200440 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r200431 due to bot failures.Manman Ren2014-01-30
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200434 91177308-0d34-0410-b5e6-96231b3b80d8
* PGO branch weight: update edge weights in SelectionDAGBuilder.Manman Ren2014-01-30
| | | | | | | | | When converting from "or + br" to two branches, or converting from "and + br" to two branches, we correctly update the edge weights of the two branches. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200431 91177308-0d34-0410-b5e6-96231b3b80d8
* PGO branch weight: update edge weights in IfConverter.Manman Ren2014-01-29
| | | | | | | | | | | | | | This commit only handles IfConvertTriangle. To update edge weights of a successor, one interface is added to MachineBasicBlock: /// Set successor weight of a given iterator. setSuccWeight(succ_iterator I, uint32_t weight) An existing testing case test/CodeGen/Thumb2/v8_IT_5.ll is updated, since we now correctly update the edge weights, the cold block is placed at the end of the function and we jump to the cold block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200428 91177308-0d34-0410-b5e6-96231b3b80d8
* Move range handling for a function to endFunction rather thanEric Christopher2014-01-29
| | | | | | when we create the subprogram DIE. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200426 91177308-0d34-0410-b5e6-96231b3b80d8
* If we use DW_AT_ranges we need to specify a base address that rangesEric Christopher2014-01-29
| | | | | | | | are relative to in the compile unit. Currently let's just use 0... Thanks to Greg Clayton for the catch! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200425 91177308-0d34-0410-b5e6-96231b3b80d8
* Turn on CU ranges if we've got multiple compile units in the sameEric Christopher2014-01-29
| | | | | | | | module since there's no range guarantee that we could make given output order. This also fixes up the testcases that have multiple CUs to have the correct range offset. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200422 91177308-0d34-0410-b5e6-96231b3b80d8
* Make the compile unit map a MapVector so that we can assume a stableEric Christopher2014-01-29
| | | | | | output ordering. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200421 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix formatting of comment.Eric Christopher2014-01-29
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200420 91177308-0d34-0410-b5e6-96231b3b80d8
* MC: Better management of macro argumentsDavid Majnemer2014-01-29
| | | | | | | | | | | | | The linux kernel makes uses of a GAS `feature' which substitutes nothing for macro arguments which aren't specified. Proper support for these kind of macro arguments necessitated a cleanup of differences between `GAS' and `Darwin' dialect macro processing. Differential Revision: http://llvm-reviews.chandlerc.com/D2634 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200409 91177308-0d34-0410-b5e6-96231b3b80d8
* [CommandLine] Aliases require an value if their target requires a value.Jordan Rose2014-01-29
| | | | | | | | | This can still be overridden by explicitly setting a value requirement on the alias option, but by default it should be the same. PR18649 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200407 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for PC-relative non-extern relocations to RuntimeDyldMachO.Lang Hames2014-01-29
| | | | | | | | | | | Also replaces testcase for r180790 (support for absolute non-externs relocs) with a more robust version. <rdar://problem/15864721> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200404 91177308-0d34-0410-b5e6-96231b3b80d8
* [X86][SchedModel] Fix typos in the definitions of the ports for Haswell.Quentin Colombet2014-01-29
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200403 91177308-0d34-0410-b5e6-96231b3b80d8
* Test commitOliver Stannard2014-01-29
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200401 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips][msa] Add fill.d instruction.Matheus Almeida2014-01-29
| | | | | | | | | This instruction is only available on Mips64 cores that implement the MSA ASE. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200400 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips][msa] Add copy_{u,s}.d.Matheus Almeida2014-01-29
| | | | | | | | | These instructions are only available on Mips64 cores that implement the MSA ASE. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200398 91177308-0d34-0410-b5e6-96231b3b80d8
generated by cgit v1.2.3 (git 2.25.1) at 2024-04-27 07:30:38 +0000