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* Swap PPC isel operands to allow for 0-foldingHal Finkel2014-02-28
* Add CR-bit tracking to the PowerPC backend for i1 valuesHal Finkel2014-02-28
* Lower FNEG just like FABS to fneg[ds] and fmov[ds], thus avoidingRoman Divacky2014-02-27
* Debug info: Remove ARMAsmPrinter::EmitDwarfRegOp(). AsmPrinter can nowAdrian Prantl2014-02-27
* [XCore] Support functions returning more than 4 words.Richard Osborne2014-02-27
* Revert r202396, r202397.Richard Osborne2014-02-27
* [XCore] Support functions returning more than 4 words.Richard Osborne2014-02-27
* [XCore] Target optimized library function __memcpy_4()Richard Osborne2014-02-27
* [XCore] Add dag combines for instructions that ignore some input bits.Richard Osborne2014-02-27
* [XCore] Provide information about known zero bits of resource instructions.Richard Osborne2014-02-27
* Stop test/CodeGen/X86/v4i32load-crash.ll targeting non-X86-64 targets.Daniel Sanders2014-02-27
* R600/SI: Optimize SI_KILL for constant operandsMichel Danzer2014-02-27
* R600/SI: Allow SI_KILL for geometry shadersMichel Danzer2014-02-27
* Use regnum regex in an XCore test case.Andrew Trick2014-02-26
* Very temporarily XFAILing a test. Will be fixed shortly.Andrew Trick2014-02-26
* Add a limit to the heuristic that register allocates instructions in local or...Andrew Trick2014-02-26
* Lower unsigned vsetcc to psubus in certain casesQuentin Colombet2014-02-26
* AArch64: simplify tbl/tbx polymorphismTim Northover2014-02-26
* ARMv8 IfConversion must skip narrow instructions that a) define CPSR and b) w...Artyom Skrobov2014-02-26
* Stop test/CodeGen/ARM/a15.ll targetting non-ARM targets.Daniel Sanders2014-02-26
* R600/SI: Custom select 64-bit ADDTom Stellard2014-02-25
* Account for 128-bit integer operations in PPCCTRLoopsHal Finkel2014-02-25
* Store a DataLayout in Module.Rafael Espindola2014-02-25
* [XCore] Add intrinsic for CLRPT (clear port time) instruction.Richard Osborne2014-02-25
* [XCore] Add intrinsic for EDU (event disable unconditional) instruction.Richard Osborne2014-02-25
* Keep the link register for uwtable.Logan Chien2014-02-25
* [XCore] Prefer to word align functions.Richard Osborne2014-02-25
* R600/SI - Add new CI arithmetic instructions.Matt Arsenault2014-02-24
* SPARC: Implement TRAP lowering. Matches what GCC emits.Benjamin Kramer2014-02-23
* AVX-512: Fixed encoding of VPTESTMQElena Demikhovsky2014-02-23
* Make test more resilient against scheduling decisions.Benjamin Kramer2014-02-22
* llvm/test/CodeGen/X86/shift-pcmp.ll: Tweak to appease FileCheck. "CHECK-LABEL...NAKAMURA Takumi2014-02-22
* [CodeGenPrepare] Fix the check of the legality of an instruction.Quentin Colombet2014-02-22
* [DAGCombiner] PCMP* sets its result to all ones or zeros so we can AND with theQuentin Colombet2014-02-21
* [AArch64] Add register constraints to avoid generating STLXR and STXR with un...Kevin Qin2014-02-21
* AArch64: __va_list.__stack must be 8-byte alignedOliver Stannard2014-02-20
* [mips] Make it impossible to have UnknownABI in CodeGen and Integrated Assemb...Daniel Sanders2014-02-20
* [mips] Make mips64 the default CPU for the mips64 architectureDaniel Sanders2014-02-20
* AVX-512: added a lit test for truncate operationElena Demikhovsky2014-02-20
* Expand 64bit {SHL,SHR,SRA}_PARTS on sparcv9.Roman Divacky2014-02-19
* Add back r201608, r201622, r201624 and r201625Rafael Espindola2014-02-19
* [mips] Use multiple FileCheck prefixes rather than run the test multiple timesDaniel Sanders2014-02-19
* [Sparc] Remove spurious checks from a testcase.Venkatraman Govindaraju2014-02-19
* Fix AVX512 vector sqrt assembly strings.Cameron McInally2014-02-19
* Revert r201622 and r201608.Daniel Jasper2014-02-19
* Avoid an infinite cycle with private linkage and -f{data|function}-sections.Rafael Espindola2014-02-19
* Fix PR18743.Rafael Espindola2014-02-18
* [AArch64] Expanded sin, cos, pow with FP vector types inputsAna Pazos2014-02-18
* XCore target: Handle common linkageRobert Lytton2014-02-18
* XCore target: Fix llvm.eh.return and EH info register handlingRobert Lytton2014-02-18