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CodeGen
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Author
Age
*
Fixup PPC Darwin i1 argument handling
Hal Finkel
2014-03-06
*
When using CR bit registers on PPC32, handle the i1 vaarg case
Hal Finkel
2014-03-06
*
[Mips] Testcase typo fix. No functionality change.
Jack Carter
2014-03-05
*
With PPC CR bit registers, handle int_to_fp on older cores
Hal Finkel
2014-03-05
*
Always print the implicit .text at the start of an asm file.
Rafael Espindola
2014-03-05
*
Lower AVX v4i64->v4i32 truncate to one shuffle.
Cameron McInally
2014-03-05
*
ARM: Correctly align arguments after a byval struct is passed on the stack
Oliver Stannard
2014-03-05
*
Make stackmap machineinstrs clobber the scratch regs too.
Andrew Trick
2014-03-05
*
Check for dynamic allocas and inline asm that clobbers sp before building
Hans Wennborg
2014-03-05
*
[XCore] Fix call of absolute address.
Richard Osborne
2014-03-04
*
[mips][msa] Correct the behaviour of the COPY_FW pseudo on lanes 2 and 3.
Daniel Sanders
2014-03-04
*
Revert "[AArch64] This is a work in progress to provide a machine description"
Chad Rosier
2014-03-04
*
[AArch64] This is a work in progress to provide a machine description
Chad Rosier
2014-03-03
*
[mips] Prevent %lo relocation being used on MSA loads and stores.
Daniel Sanders
2014-03-03
*
Add a PPC inline asm constraint type for single CR bits
Hal Finkel
2014-03-02
*
AVX-512: Fixed extract_vector_elt for v8i1 vector
Elena Demikhovsky
2014-03-02
*
R600: Add failing control flow tests.
Matt Arsenault
2014-03-01
*
Remove extra truncs/exts around i32 bit operations on PPC64
Hal Finkel
2014-03-01
*
[Sparc] Add support for parsing directives in SparcAsmParser.
Venkatraman Govindaraju
2014-03-01
*
[Sparc] Emit 'restore' instead of 'restore %g0, %g0, %g0'. This improves the ...
Venkatraman Govindaraju
2014-03-01
*
SpillPlacement: fix a bug in iterate.
Manman Ren
2014-02-28
*
R600/SI: Expand all v16[if]32 operations
Tom Stellard
2014-02-28
*
CommandLine: Exit successfully for -version and -help
Justin Bogner
2014-02-28
*
Test commit
Adam Nemet
2014-02-28
*
Fixed operand of SC microMIPS instruction.
Zoran Jovanovic
2014-02-28
*
Swap PPC isel operands to allow for 0-folding
Hal Finkel
2014-02-28
*
Add CR-bit tracking to the PowerPC backend for i1 values
Hal Finkel
2014-02-28
*
Lower FNEG just like FABS to fneg[ds] and fmov[ds], thus avoiding
Roman Divacky
2014-02-27
*
Debug info: Remove ARMAsmPrinter::EmitDwarfRegOp(). AsmPrinter can now
Adrian Prantl
2014-02-27
*
[XCore] Support functions returning more than 4 words.
Richard Osborne
2014-02-27
*
Revert r202396, r202397.
Richard Osborne
2014-02-27
*
[XCore] Support functions returning more than 4 words.
Richard Osborne
2014-02-27
*
[XCore] Target optimized library function __memcpy_4()
Richard Osborne
2014-02-27
*
[XCore] Add dag combines for instructions that ignore some input bits.
Richard Osborne
2014-02-27
*
[XCore] Provide information about known zero bits of resource instructions.
Richard Osborne
2014-02-27
*
Stop test/CodeGen/X86/v4i32load-crash.ll targeting non-X86-64 targets.
Daniel Sanders
2014-02-27
*
R600/SI: Optimize SI_KILL for constant operands
Michel Danzer
2014-02-27
*
R600/SI: Allow SI_KILL for geometry shaders
Michel Danzer
2014-02-27
*
Use regnum regex in an XCore test case.
Andrew Trick
2014-02-26
*
Very temporarily XFAILing a test. Will be fixed shortly.
Andrew Trick
2014-02-26
*
Add a limit to the heuristic that register allocates instructions in local or...
Andrew Trick
2014-02-26
*
Lower unsigned vsetcc to psubus in certain cases
Quentin Colombet
2014-02-26
*
AArch64: simplify tbl/tbx polymorphism
Tim Northover
2014-02-26
*
ARMv8 IfConversion must skip narrow instructions that a) define CPSR and b) w...
Artyom Skrobov
2014-02-26
*
Stop test/CodeGen/ARM/a15.ll targetting non-ARM targets.
Daniel Sanders
2014-02-26
*
R600/SI: Custom select 64-bit ADD
Tom Stellard
2014-02-25
*
Account for 128-bit integer operations in PPCCTRLoops
Hal Finkel
2014-02-25
*
Store a DataLayout in Module.
Rafael Espindola
2014-02-25
*
[XCore] Add intrinsic for CLRPT (clear port time) instruction.
Richard Osborne
2014-02-25
*
[XCore] Add intrinsic for EDU (event disable unconditional) instruction.
Richard Osborne
2014-02-25
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