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* AArch64: print relocation addends if present on AArch64Tim Northover2013-06-17
* ARM: fix thumb coprocessor instruction with pre-writeback disassemblyAmaury de la Vieuville2013-06-14
* ARM: fix B decodingAmaury de la Vieuville2013-06-13
* ARM: fix t2am_imm8_offset operand printing for imm=#-0Amaury de la Vieuville2013-06-13
* X86: Make the cmov aliases work with intel syntax too.Benjamin Kramer2013-06-13
* [MC/DWARF] Support .debug_frame / .debug_line code alignment factorsUlrich Weigand2013-06-12
* [PowerPC] Use assembler source in MC testsUlrich Weigand2013-06-12
* Rework r183728, suppress assert(0) for now. Its behavior depends on assertion...NAKAMURA Takumi2013-06-11
* It adds support for negative zero offsets for loads and stores.Mihai Popa2013-06-11
* This patch adds support for FPINST/FPINST2 as operands to vmsr/vmrs. These ar...Mihai Popa2013-06-11
* ARM: Enforce decoding rules for VLDn instructionsAmaury de la Vieuville2013-06-11
* ARM: Fix STREX/LDREX reecodingAmaury de la Vieuville2013-06-11
* Tweak a couple of tests on win32 hosts with +Asserts.NAKAMURA Takumi2013-06-11
* ARM: diagnose ARM/Thumb assembly switches on CPUs only supporting one.Tim Northover2013-06-10
* [PowerPC] Support extended sc mnemonicUlrich Weigand2013-06-10
* [PowerPC] Support branch mnemonics with implied CR0Ulrich Weigand2013-06-10
* ARM: ISB cannot be passed the same options as DMBAmaury de la Vieuville2013-06-10
* Fix ARM unwind opcode assembler in several cases.Logan Chien2013-06-09
* ARM: fix VMOVvnf32 decoding when ambiguous with VCVTAmaury de la Vieuville2013-06-08
* ARM: enforce SRS decoding constraintsAmaury de la Vieuville2013-06-08
* ARM: fix CPS decoding when ambiguous with QADDAmaury de la Vieuville2013-06-08
* ARM: fix VCVT decodingAmaury de la Vieuville2013-06-08
* Don't hide the first ELF symbol.Rafael Espindola2013-06-05
* This is a simple patch that changes RRX and RRXS to accept all registers as o...Mihai Popa2013-06-05
* ARM: permit upper-case BE/LE on setend instructionTim Northover2013-05-31
* ARM: add fstmx and fldmx instructions for assemblyTim Northover2013-05-31
* ARM: fix VEXT encoding corner caseTim Northover2013-05-31
* Change how we iterate over relocations on ELF.Rafael Espindola2013-05-30
* [SystemZ] Immediate compare-and-branch supportRichard Sandiford2013-05-29
* Mips assembler: Improve set register alias handlingJack Carter2013-05-28
* [SystemZ] Register compare-and-branch supportRichard Sandiford2013-05-28
* Add support for DWARF line number table entries for values in the instructionCameron Zwarich2013-05-25
* [SystemZ] Improve AsmParser handling of invalid instructionsRichard Sandiford2013-05-24
* [SystemZ] Improve AsmParser register parsingRichard Sandiford2013-05-24
* VSTn instructions have a number of encoding constraints which are not impleme...Mihai Popa2013-05-20
* Q registers are encoded in fields of the same length as D registers. As Q reg...Mihai Popa2013-05-20
* [PowerPC] Merge/rename PPC fixup typesUlrich Weigand2013-05-17
* [PowerPC] Fix processing of ha16/lo16 fixupsUlrich Weigand2013-05-17
* Mips assembler: Add TwoOperandConstraint definitionsJack Carter2013-05-16
* Mips assembler: Add branch macro definitionsJack Carter2013-05-16
* [PowerPC] Remove need for adjustFixupOffst hackUlrich Weigand2013-05-15
* [SystemZ] Make use of SUBTRACT HALFWORDRichard Sandiford2013-05-15
* [PowerPC] Add test case for r181891Ulrich Weigand2013-05-15
* [SystemZ] Consolidate disassembler tests for valid input into 2 big testsRichard Sandiford2013-05-15
* [SystemZ] Consolidate assembler tests into 4 big testsRichard Sandiford2013-05-15
* Implement the PowerPC system call (sc) instruction.Bill Schmidt2013-05-14
* Fix ARM FastISel tests, as a first step to enabling ARM FastISelDerek Schuff2013-05-14
* [SystemZ] Add disassembler supportRichard Sandiford2013-05-14
* [SystemZ] Add extra testscases for r181773Richard Sandiford2013-05-14
* [SystemZ] Rework handling of constant PC-relative operandsRichard Sandiford2013-05-14
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